mb/google/poppy/variants/baseboard: Add gpio-keys ACPI node for PENH
This change uses gpio_keys driver to add ACPI node for pen eject event. BUG=b:74413116 TEST=Verified using evtest that pen eject event results in events as expected. Change-Id: I6019d633f4337137bb9fbba770040cb5b30da773 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://review.coreboot.org/25147 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -318,6 +318,15 @@ chip soc/intel/skylake
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register "hid_desc_reg_offset" = "0x1"
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device i2c 0x9 on end
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end
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chip drivers/generic/gpio_keys
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register "name" = ""PENH""
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register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_D8)"
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register "key.dev_name" = ""EJCT""
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register "key.linux_code" = "SW_PEN_INSERTED"
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register "key.linux_input_type" = "EV_SW"
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register "key.label" = ""pen_eject""
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device generic 0 on end
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end
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end # I2C #3
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device pci 16.0 on end # Management Engine Interface 1
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device pci 16.1 off end # Management Engine Interface 2
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@ -177,7 +177,7 @@ static const struct pad_config gpio_table[] = {
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/* D7 : ISH_I2C1_SDA ==> NC */
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PAD_CFG_NC(GPP_D7),
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/* D8 : ISH_I2C1_SCL ==> PEN_EJECT_ODL -- for notification */
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PAD_CFG_GPI(GPP_D8, 20K_PU, PLTRST),
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PAD_CFG_GPI_GPIO_DRIVER(GPP_D8, 20K_PU, DEEP),
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/* D9 : ISH_SPI_CS# ==> HP_IRQ_GPIO */
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PAD_CFG_GPI_GPIO_DRIVER(GPP_D9, NONE, PLTRST),
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/* D10 : ISH_SPI_CLK ==> SPKR_RST_L */
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