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soc/intel/common/smbus: lock TCO base address on PCH finalize 

Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Change-Id: Idab9419487e6e4cbdecd2efaa4772ff4960c9055
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35525
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
This commit is contained in:
Michael Niewöhner 2019-09-22 13:27:20 +02:00 committed by Patrick Georgi
parent b48e6357e8
commit 3c20cba289
1 changed files with 5 additions and 0 deletions
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5
src/soc/intel/common/block/smbus/tco.c
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@ -24,6 +24,7 @@
#define TCOBASE 0x50
#define TCOCTL 0x54
#define TCO_BASE_EN (1 << 8)
#define TCO_BASE_LOCK (1 << 0)
/* Get base address of TCO I/O registers. */
static uint16_t tco_get_bar(void)
@ -52,6 +53,10 @@ void tco_write_reg(uint16_t tco_reg, uint16_t value)
void tco_lockdown(void)
{
uint16_t tcocnt;
const pci_devfn_t dev = PCH_DEV_SMBUS;
/* TCO base address lockdown */
pci_or_config32(dev, TCOCTL, TCO_BASE_LOCK);
/* TCO Lock down */
tcocnt = tco_read_reg(TCO1_CNT);