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southbridge,Makefile.inc: Trivial - drop trailing blank lines at EOF 

Change-Id: Ied03e8814ea13f0e677a1d34da19efe6dfebf72f
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6288
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
This commit is contained in:
Edward O'Callaghan 2014-07-16 19:05:51 +10:00
parent dc112e3515
commit 3c41876e71
9 changed files with 0 additions and 10 deletions
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2
src/southbridge/amd/cimx/sb900/Makefile.inc
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@ -32,5 +32,3 @@ ramstage-y += reset.c
ramstage-y += smbus.c
ramstage-y += lpc.c

1
src/southbridge/intel/i82801ax/Makefile.inc
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@ -30,4 +30,3 @@ ramstage-y += reset.c
ramstage-y += watchdog.c
romstage-y += early_smbus.c

1
src/southbridge/intel/i82801bx/Makefile.inc
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@ -31,4 +31,3 @@ ramstage-y += reset.c
ramstage-y += watchdog.c
romstage-y += early_smbus.c

1
src/southbridge/nvidia/Makefile.inc
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@ -1,3 +1,2 @@
subdirs-$(CONFIG_SOUTHBRIDGE_NVIDIA_CK804) += ck804
subdirs-$(CONFIG_SOUTHBRIDGE_NVIDIA_MCP55) += mcp55

1
src/southbridge/nvidia/ck804/Makefile.inc
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@ -21,4 +21,3 @@ romstage-y += early_smbus.c
chipset_bootblock_inc += $(src)/southbridge/nvidia/ck804/romstrap.inc
chipset_bootblock_lds += $(src)/southbridge/nvidia/ck804/romstrap.lds

1
src/southbridge/sis/Makefile.inc
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@ -1,2 +1 @@
subdirs-$(CONFIG_SOUTHBRIDGE_SIS_SIS966) += sis966

1
src/southbridge/ti/pci7420/Makefile.inc
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@ -19,4 +19,3 @@
ramstage-y += cardbus.c
ramstage-y += firewire.c

1
src/southbridge/ti/pcixx12/Makefile.inc
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@ -18,4 +18,3 @@
##
ramstage-y += pcixx12.c

1
src/southbridge/via/Makefile.inc
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@ -2,4 +2,3 @@ subdirs-$(CONFIG_SOUTHBRIDGE_VIA_K8T890) += k8t890
subdirs-$(CONFIG_SOUTHBRIDGE_VIA_VT8231) += vt8231
subdirs-$(CONFIG_SOUTHBRIDGE_VIA_VT8235) += vt8235
subdirs-$(CONFIG_SOUTHBRIDGE_VIA_VT8237R) += vt8237r