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armv8/secmon: Correct PSCI function ids 

PSCI_CPU_OFF is SMC32 call, there is not SMC64 version. Register SMC32
and SMC64 types of PSCI calls.

BUG=None
BRANCH=None
TEST=Compiles successfully and CPU off works fine with PSCI command.

Change-Id: I8df2eabfff52924625426b3607720c5219d38b58
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 9228c07f9d9a4dd6325afb1f64b41b9b8711b146
Original-Change-Id: I2f387291893c1acf40bb6aa26f3d2ee8d5d843ea
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/265622
Original-Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9925
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Furquan Shaikh 2015-04-09 08:22:57 -07:00 committed by Patrick Georgi
parent 97a20caa53
commit 3c526b1425
2 changed files with 7 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
src/arch/arm64/armv8/secmon/psci.c
View File

@ -368,7 +368,7 @@ static int psci_handler(struct smc_call *smc)
case PSCI_CPU_ON64: case PSCI_CPU_ON64:
psci_cpu_on(pf); psci_cpu_on(pf);
break; break;
case PSCI_CPU_OFF64: case PSCI_CPU_OFF32:
psci32_return(pf, psci_turn_off_self()); psci32_return(pf, psci_turn_off_self());
break; break;
default: default:
@ -563,7 +563,12 @@ void psci_init(uintptr_t cpu_on_entry)
printk(BIOS_ERR, "Error linking cpu_info to PSCI nodes.\n"); printk(BIOS_ERR, "Error linking cpu_info to PSCI nodes.\n");
/* Register PSCI handlers. */ /* Register PSCI handlers. */
if (smc_register_range(PSCI_CPU_OFF64, PSCI_CPU_ON64, &psci_handler)) if (smc_register_range(PSCI_CPU_SUSPEND32, PSCI_CPU_ON32,
&psci_handler))
printk(BIOS_ERR, "Couldn't register PSCI handler.\n");
if (smc_register_range(PSCI_CPU_SUSPEND64, PSCI_CPU_ON64,
&psci_handler))
printk(BIOS_ERR, "Couldn't register PSCI handler.\n"); printk(BIOS_ERR, "Couldn't register PSCI handler.\n");
/* Inform SoC layer of CPU_ON entry point. */ /* Inform SoC layer of CPU_ON entry point. */

1
src/arch/arm64/include/arch/psci.h
View File

@ -164,7 +164,6 @@ enum {
/* 64-bit CPU support functions. */ /* 64-bit CPU support functions. */
PSCI_CPU_SUSPEND64 = SMC_FUNC_FAST64(0x4, 0x1), PSCI_CPU_SUSPEND64 = SMC_FUNC_FAST64(0x4, 0x1),
PSCI_CPU_OFF64 = SMC_FUNC_FAST64(0x4, 0x2),
PSCI_CPU_ON64 = SMC_FUNC_FAST64(0x4, 0x3), PSCI_CPU_ON64 = SMC_FUNC_FAST64(0x4, 0x3),
}; };