Move SB800 clock init earlier
Committing Scott's e350m1 changes (svn r6585): Move SB800 clock init earlier, Fixes problem where initial serial port output is garbled. Change-Id: If05aa37726b962e8994ee69bf1882fcfae56aa19 Signed-off-by: Scott Duplichan <scott@notabs.org> Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Reviewed-on: http://review.coreboot.org/32 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
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@ -55,6 +55,21 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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// all cores: set pstate 0 (1600 MHz) early to save a few ms of boot time
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__writemsr(0xc0010062, 0);
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if (boot_cpu()) {
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u8 reg8;
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// SB800: Program AcpiMmioEn to enable MMIO access to MiscCntrl register
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outb(0x24, 0xCD6);
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reg8 = inb(0xCD7);
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reg8 |= 1;
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reg8 &= ~(1 << 1);
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outb(0x24, 0xCD6);
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outb(reg8, 0xCD7);
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// Program SB800 MiscCntrl
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*(volatile u32 *)(0xFED80000 + 0xE00 + 0x40) &= ~((1 << 0) | (1 << 2)); /* 48Mhz */
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*(volatile u32 *)(0xFED80000 + 0xE00 + 0x40) |= 1 << 1; /* 48Mhz */
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}
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if (!cpu_init_detectedx && boot_cpu()) {
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post_code(0x30);
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sb_poweron_init();
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@ -63,17 +78,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
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console_init();
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}
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//reg8 = pmio_read(0x24);
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outb(0x24, 0xCD6);
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reg8 = inb(0xCD7);
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reg8 |= 1;
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reg8 &= ~(1 << 1);
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//pmio_write(0x24, reg8);
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outb(0x24, 0xCD6);
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outb(reg8, 0xCD7);
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*(volatile u32 *)(0xFED80000 + 0xE00 + 0x40) &= ~((1 << 0) | (1 << 2)); /* 48Mhz */
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*(volatile u32 *)(0xFED80000 + 0xE00 + 0x40) |= 1 << 1; /* 48Mhz */
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/* Halt if there was a built in self test failure */
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post_code(0x34);
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