From 3c965dc3ac650b96097693d17cf1b96aec63b981 Mon Sep 17 00:00:00 2001 From: Mario Scheithauer Date: Thu, 27 Jan 2022 09:23:22 +0100 Subject: [PATCH] mb/siemens/mc_ehl2: Disable SATA With latest hardware revision SATA interface is no longer used on this mainboard. The mainboard is still in development and not yet released and for this reason there may still be adjustments. Change-Id: Icbf088ce4c907e207f6f5d11b8bf5556fe2c90d6 Signed-off-by: Mario Scheithauer Reviewed-on: https://review.coreboot.org/c/coreboot/+/61414 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh --- .../siemens/mc_ehl/variants/mc_ehl2/devicetree.cb | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb index acb928665e..4982384052 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb @@ -77,13 +77,7 @@ chip soc/intel/elkhartlake register "PcieRpLtrDisable[4]" = "true" register "PcieRpLtrDisable[6]" = "true" - # Storage (SATA/SDCARD/EMMC) related UPDs - register "SataSalpSupport" = "0" - register "SataPortsEnable[0]" = "0" - register "SataPortsEnable[1]" = "1" - register "SataPortsDevSlp[0]" = "0" - register "SataPortsDevSlp[1]" = "0" - + # Storage (SDCARD/EMMC) related UPDs register "ScsEmmcHs400Enabled" = "1" register "ScsEmmcDdr50Enabled" = "1" register "SdCardPowerEnableActiveHigh" = "1" @@ -155,8 +149,6 @@ chip soc/intel/elkhartlake device pci 16.0 hidden end # Management Engine Interface 1 - device pci 17.0 on end # SATA - device pci 19.0 on end # I2C4 device pci 19.1 on end # I2C5 device pci 19.2 on end # UART2