soc/intel/common: add acpi_get_sleep_type to pmclib

Change-Id: I3f4123657a375211f802a7d484a15353f9a256e9
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/28795
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hannah Williams <hannah.williams@intel.com>

src/soc/intel/cannonlake/romstage/power_state.c

@@ -24,14 +24,6 @@
 #include <soc/pci_devs.h>
 #include <soc/pm.h>
 
-int acpi_get_sleep_type(void)
-{
-	struct chipset_power_state *ps;
-
-	ps = pmc_get_power_state();
-	return ps->prev_sleep_state;
-}
-
 static inline int deep_s3_enabled(void)
 {
 	uint32_t deep_s3_pol;

src/soc/intel/common/block/pmc/pmclib.c

@@ -93,6 +93,14 @@ __weak void pmc_soc_restore_power_failure(void)
 	 */
 }
 
+int acpi_get_sleep_type(void)
+{
+	struct chipset_power_state *ps;
+
+	ps = pmc_get_power_state();
+	return ps->prev_sleep_state;
+}
+
 static uint32_t pmc_reset_smi_status(void)
 {
 	uint32_t smi_sts = inl(ACPI_BASE_ADDRESS + SMI_STS);

src/soc/intel/skylake/pmutil.c

@@ -309,11 +309,3 @@ void soc_fill_power_state(struct chipset_power_state *ps)
 	printk(BIOS_DEBUG, "GBLRST_CAUSE: %08x %08x\n",
 	       ps->gblrst_cause[0], ps->gblrst_cause[1]);
 }
-
-int acpi_get_sleep_type(void)
-{
-	struct chipset_power_state *ps;
-
-	ps = pmc_get_power_state();
-	return ps->prev_sleep_state;
-}