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mb/pcengines: Drop unneeded empty lines 

Change-Id: Ia1f5c22287be0d228ce1d569f3224d9d63093f3a
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44619
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Elyes HAOUAS 2020-08-19 21:58:31 +02:00 committed by Patrick Georgi
parent 0a490d246c
commit 3cb8abd1b6
6 changed files with 0 additions and 9 deletions
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1
src/mainboard/pcengines/apu1/OemCustomize.c
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@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <AGESA.h> #include <AGESA.h>
#include <northbridge/amd/agesa/state_machine.h> #include <northbridge/amd/agesa/state_machine.h>
#include <PlatformMemoryConfiguration.h> #include <PlatformMemoryConfiguration.h>

2
src/mainboard/pcengines/apu1/platform_cfg.h
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@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#ifndef _PLATFORM_CFG_H_ #ifndef _PLATFORM_CFG_H_
#define _PLATFORM_CFG_H_ #define _PLATFORM_CFG_H_
@ -112,7 +111,6 @@
*/ */
#define SATA_PORT_MULT_CAP_RESERVED 1 #define SATA_PORT_MULT_CAP_RESERVED 1
/** /**
* @def AZALIA_AUTO * @def AZALIA_AUTO
* @brief Detect Azalia controller automatically. * @brief Detect Azalia controller automatically.

2
src/mainboard/pcengines/apu2/BiosCallOuts.c
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@ -27,7 +27,6 @@ const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts);
//{AGESA_GNB_GFX_GET_VBIOS_IMAGE, agesa_NoopUnsupported } //{AGESA_GNB_GFX_GET_VBIOS_IMAGE, agesa_NoopUnsupported }
/* /*
* Hardware Monitor Fan Control * Hardware Monitor Fan Control
* Hardware limitation: * Hardware limitation:
@ -58,7 +57,6 @@ void board_FCH_InitEnv(struct sysinfo *cb_NA, FCH_DATA_BLOCK *FchParams)
{ {
printk(BIOS_DEBUG, "Fch OEM config in INIT ENV "); printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
FchParams->Azalia.AzaliaEnable = AzDisable; FchParams->Azalia.AzaliaEnable = AzDisable;
/* Fan Control */ /* Fan Control */

1
src/mainboard/pcengines/apu2/irq_tables.c
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@ -25,7 +25,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu; pirq_info->rfu = rfu;
} }
unsigned long write_pirq_routing_table(unsigned long addr) unsigned long write_pirq_routing_table(unsigned long addr)
{ {
struct irq_routing_table *pirq; struct irq_routing_table *pirq;

1
src/mainboard/pcengines/apu2/mainboard.c
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@ -22,7 +22,6 @@
#define PM_RTC_CONTROL 0x56 #define PM_RTC_CONTROL 0x56
#define PM_S_STATE_CONTROL 0xBA #define PM_S_STATE_CONTROL 0xBA
/*********************************************************** /***********************************************************
* These arrays set up the FCH PCI_INTR registers 0xC00/0xC01. * These arrays set up the FCH PCI_INTR registers 0xC00/0xC01.
* This table is responsible for physically routing the PIC and * This table is responsible for physically routing the PIC and

2
src/mainboard/pcengines/apu2/mptable.c
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@ -62,7 +62,6 @@ static void *smp_write_config_table(void *v)
#define PCI_INT(bus, dev, int_sign, pin) \ #define PCI_INT(bus, dev, int_sign, pin) \
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin)) smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin))
/* SMBUS / ACPI */ /* SMBUS / ACPI */
PCI_INT(0x0, 0x14, 0x0, intr_data_ptr[PIRQ_SMBUS]); PCI_INT(0x0, 0x14, 0x0, intr_data_ptr[PIRQ_SMBUS]);
@ -85,7 +84,6 @@ static void *smp_write_config_table(void *v)
PCI_INT(0x1, 0x0, 0x0, intr_data_ptr[PIRQ_E]); PCI_INT(0x1, 0x0, 0x0, intr_data_ptr[PIRQ_E]);
PCI_INT(0x2, 0x0, 0x0, intr_data_ptr[PIRQ_F]); PCI_INT(0x2, 0x0, 0x0, intr_data_ptr[PIRQ_F]);
/* GPP0 */ /* GPP0 */
PCI_INT(0x0, 0x2, 0x0, 0x10); // Network 3 PCI_INT(0x0, 0x2, 0x0, 0x10); // Network 3
/* GPP1 */ /* GPP1 */