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veyron_*: Use common CBFS wrapper 

This switches all the rk3288 platforms to use the common CBFS wrapper
instead of implementing its own CBFS media driver. It also happens
that veyron_* platforms use Gigadevice SPI flash (at least for now).

As we use more SPI-related stuff, for example eventlog and vboot data in
Brain's case, we will need to use more of the SPI API anyway. This
prevents us from having to duplicate pieces of it for rk3288.

BUG=none
BRANCH=none
TEST=built and booted on Pinky

Change-Id: Ie462456814646fdc277485d9e2d8c901fd4936e7
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 2d6df2fe6d78bc8eee8689019b9aaf29c82b6b30
Original-Signed-off-by: David Hendricks <dhendrix@chromium.org>
Original-Change-Id: Id307bd5fb6cc8f79411d8c66e1370e80c58d017b
Original-Reviewed-on: https://chromium-review.googlesource.com/235882
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/9678
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
David Hendricks 2014-12-15 16:15:23 -08:00 committed by Stefan Reinauer
parent cbad906d37
commit 3cbf02cc88
7 changed files with 16 additions and 107 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/mainboard/google/veyron_jerry/Kconfig
View File

@ -22,6 +22,8 @@ if BOARD_GOOGLE_VEYRON_JERRY
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select BOARD_ID_SUPPORT
select CHROMEOS_VBNV_EC
select COMMON_CBFS_SPI_WRAPPER
select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_SPI
select EC_SOFTWARE_SYNC
@ -33,6 +35,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select MAINBOARD_HAS_BOOTBLOCK_INIT
select HAVE_HARD_RESET
select RETURN_FROM_VERSTAGE
select SPI_FLASH
select SPI_FLASH_GIGADEVICE
select VIRTUAL_DEV_SWITCH
config MAINBOARD_DIR

4
src/mainboard/google/veyron_mighty/Kconfig
View File

@ -22,6 +22,8 @@ if BOARD_GOOGLE_VEYRON_MIGHTY
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select BOARD_ID_SUPPORT
select CHROMEOS_VBNV_EC
select COMMON_CBFS_SPI_WRAPPER
select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_SPI
select EC_SOFTWARE_SYNC
@ -33,6 +35,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select MAINBOARD_HAS_BOOTBLOCK_INIT
select HAVE_HARD_RESET
select RETURN_FROM_VERSTAGE
select SPI_FLASH
select SPI_FLASH_GIGADEVICE
select VIRTUAL_DEV_SWITCH
config MAINBOARD_DIR

4
src/mainboard/google/veyron_pinky/Kconfig
View File

@ -22,6 +22,8 @@ if BOARD_GOOGLE_VEYRON_PINKY
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select BOARD_ID_SUPPORT
select CHROMEOS_VBNV_EC
select COMMON_CBFS_SPI_WRAPPER
select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_SPI
select EC_SOFTWARE_SYNC
@ -33,6 +35,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select MAINBOARD_HAS_BOOTBLOCK_INIT
select HAVE_HARD_RESET
select RETURN_FROM_VERSTAGE
select SPI_FLASH
select SPI_FLASH_GIGADEVICE
select VIRTUAL_DEV_SWITCH
config MAINBOARD_DIR

4
src/mainboard/google/veyron_speedy/Kconfig
View File

@ -23,6 +23,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select BOARD_ID_SUPPORT
select BOARD_ROMSIZE_KB_4096
select CHROMEOS_VBNV_EC
select COMMON_CBFS_SPI_WRAPPER
select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_SPI
select EC_SOFTWARE_SYNC
@ -33,6 +35,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select MAINBOARD_HAS_BOOTBLOCK_INIT
select HAVE_HARD_RESET
select RETURN_FROM_VERSTAGE
select SPI_FLASH
select SPI_FLASH_GIGADEVICE
select VIRTUAL_DEV_SWITCH
config MAINBOARD_DIR

4
src/soc/rockchip/rk3288/Makefile.inc
View File

@ -27,7 +27,6 @@ endif
bootblock-y += timer.c
bootblock-y += clock.c
bootblock-y += spi.c
bootblock-y += media.c
bootblock-y += gpio.c
bootblock-y += i2c.c
bootblock-y += rk808.c
@ -38,7 +37,6 @@ verstage-$(CONFIG_DRIVERS_UART) += uart.c
verstage-y += gpio.c
verstage-y += clock.c
verstage-y += i2c.c
verstage-y += media.c
romstage-y += cbmem.c
romstage-y += timer.c
@ -47,7 +45,6 @@ romstage-y += i2c.c
romstage-y += clock.c
romstage-y += gpio.c
romstage-y += spi.c
romstage-y += media.c
romstage-y += sdram.c
romstage-y += rk808.c
romstage-y += pwm.c
@ -60,7 +57,6 @@ ramstage-y += i2c.c
ramstage-y += clock.c
ramstage-y += spi.c
ramstage-y += gpio.c
ramstage-y += media.c
ramstage-y += rk808.c
ramstage-y += pwm.c
ramstage-y += vop.c

28
src/soc/rockchip/rk3288/media.c
View File

@ -1,28 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Rockchip Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <cbfs.h>
#include <soc/spi.h>
#include <symbols.h>
int init_default_cbfs_media(struct cbfs_media *media)
{
return initialize_rockchip_spi_cbfs_media(media,
_cbfs_cache, _cbfs_cache_size);
}

75
src/soc/rockchip/rk3288/spi.c
View File

@ -297,78 +297,3 @@ struct rockchip_spi_media {
struct spi_slave *slave;
struct cbfs_simple_buffer buffer;
};
static int rockchip_spi_cbfs_open(struct cbfs_media *media)
{
return 0;
}
static int rockchip_spi_cbfs_close(struct cbfs_media *media)
{
return 0;
}
static size_t rockchip_spi_cbfs_read(struct cbfs_media *media, void *dest,
size_t offset, size_t count)
{
unsigned int cmd;
struct rockchip_spi_media *spi =
(struct rockchip_spi_media *)media->context;
int ret;
spi_claim_bus(spi->slave);
cmd = swab32(offset) | SF_READ_DATA_CMD;
if (spi_xfer(spi->slave, &cmd, sizeof(cmd), NULL, 0)) {
printk(BIOS_DEBUG, "%s: could not send command\n", __func__);
ret = 0;
goto rockchip_spi_cbfs_read_done;
}
if (spi_xfer(spi->slave, NULL, 0, dest, count)) {
printk(BIOS_DEBUG, "%s: could not receive data\n", __func__);
ret = 0;
goto rockchip_spi_cbfs_read_done;
}
rockchip_spi_cbfs_read_done:
spi_release_bus(spi->slave);
return ret < 0 ? 0 : count;
}
static void *rockchip_spi_cbfs_map(struct cbfs_media *media, size_t offset,
size_t count)
{
struct rockchip_spi_media *spi =
(struct rockchip_spi_media *)media->context;
count = ALIGN_UP(count, 4);
return cbfs_simple_buffer_map(&spi->buffer, media, offset, count);
}
static void *rockchip_spi_cbfs_unmap(struct cbfs_media *media,
const void *address)
{
struct rockchip_spi_media *spi =
(struct rockchip_spi_media *)media->context;
return cbfs_simple_buffer_unmap(&spi->buffer, address);
}
int initialize_rockchip_spi_cbfs_media(struct cbfs_media *media,
void *buffer_address, size_t buffer_size)
{
static struct rockchip_spi_media context;
static struct rockchip_spi_slave *eslave = &rockchip_spi_slaves[2];
context.slave = &eslave->slave;
context.buffer.allocated = context.buffer.last_allocate = 0;
context.buffer.buffer = buffer_address;
context.buffer.size = buffer_size;
media->context = (void *)&context;
media->open = rockchip_spi_cbfs_open;
media->close = rockchip_spi_cbfs_close;
media->read = rockchip_spi_cbfs_read;
media->map = rockchip_spi_cbfs_map;
media->unmap = rockchip_spi_cbfs_unmap;
return 0;
}