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soc/amd: Remove dummy SOC_SPECIFIC_OPTIONS 

Change-Id: I080b7b579338c3cf342beabda54f43f525d8b65c
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71679
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Elyes Haouas 2023-01-05 07:42:24 +01:00 committed by Felix Held
parent 6de377ef78
commit 3cd06cc427
6 changed files with 35 additions and 53 deletions
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11
src/soc/amd/cezanne/Kconfig
View File

@ -2,13 +2,6 @@
config SOC_AMD_CEZANNE
bool
help
AMD Cezanne support
if SOC_AMD_CEZANNE
config SOC_SPECIFIC_OPTIONS
def_bool y
select ACPI_SOC_NVS
select ARCH_X86
select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH
@ -83,6 +76,10 @@ config SOC_SPECIFIC_OPTIONS
select VBOOT_DEFINE_WIDEVINE_COUNTERS if VBOOT_STARTS_BEFORE_BOOTBLOCK
select X86_AMD_FIXED_MTRRS
select X86_INIT_NEED_1_SIPI
help
AMD Cezanne support
if SOC_AMD_CEZANNE
config CHIPSET_DEVICETREE
string

11
src/soc/amd/glinda/Kconfig
View File

@ -5,13 +5,6 @@
config SOC_AMD_GLINDA
bool
help
AMD Glinda support
if SOC_AMD_GLINDA
config SOC_SPECIFIC_OPTIONS
def_bool y
select ACPI_SOC_NVS
select ARCH_X86
select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH
@ -88,6 +81,10 @@ config SOC_SPECIFIC_OPTIONS
select VBOOT_DEFINE_WIDEVINE_COUNTERS if VBOOT_STARTS_BEFORE_BOOTBLOCK
select X86_AMD_FIXED_MTRRS
select X86_INIT_NEED_1_SIPI
help
AMD Glinda support
if SOC_AMD_GLINDA
config CHIPSET_DEVICETREE
string

33
src/soc/amd/mendocino/Kconfig
View File

@ -2,24 +2,6 @@
config SOC_AMD_REMBRANDT_BASE
bool
config SOC_AMD_MENDOCINO
bool
select SOC_AMD_REMBRANDT_BASE
help
AMD Mendocino support
config SOC_AMD_REMBRANDT
bool
select SOC_AMD_REMBRANDT_BASE
help
AMD Rembrandt support
if SOC_AMD_REMBRANDT_BASE
config SOC_SPECIFIC_OPTIONS
def_bool y
select ACPI_SOC_NVS
select ARCH_X86
select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH
@ -101,6 +83,21 @@ config SOC_SPECIFIC_OPTIONS
select X86_AMD_FIXED_MTRRS
select X86_INIT_NEED_1_SIPI
config SOC_AMD_MENDOCINO
bool
select SOC_AMD_REMBRANDT_BASE
help
AMD Mendocino support
config SOC_AMD_REMBRANDT
bool
select SOC_AMD_REMBRANDT_BASE
help
AMD Rembrandt support
if SOC_AMD_REMBRANDT_BASE
config CHIPSET_DEVICETREE
string
default "soc/amd/mendocino/chipset_mendocino.cb" if SOC_AMD_MENDOCINO

11
src/soc/amd/morgana/Kconfig
View File

@ -5,13 +5,6 @@
config SOC_AMD_MORGANA
bool
help
AMD Morgana support
if SOC_AMD_MORGANA
config SOC_SPECIFIC_OPTIONS
def_bool y
select ACPI_SOC_NVS
select ARCH_X86
select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH
@ -88,6 +81,10 @@ config SOC_SPECIFIC_OPTIONS
select VBOOT_DEFINE_WIDEVINE_COUNTERS if VBOOT_STARTS_BEFORE_BOOTBLOCK
select X86_AMD_FIXED_MTRRS
select X86_INIT_NEED_1_SIPI
help
AMD Morgana support
if SOC_AMD_MORGANA
config CHIPSET_DEVICETREE
string

11
src/soc/amd/picasso/Kconfig
View File

@ -2,13 +2,6 @@
config SOC_AMD_PICASSO
bool
help
AMD Picasso support
if SOC_AMD_PICASSO
config CPU_SPECIFIC_OPTIONS
def_bool y
select ACPI_SOC_NVS
select ADD_FSP_BINARIES if USE_AMD_BLOBS
select ARCH_X86
@ -76,6 +69,10 @@ config CPU_SPECIFIC_OPTIONS
select X86_AMD_FIXED_MTRRS
select X86_INIT_NEED_1_SIPI
select HAVE_EXP_X86_64_SUPPORT
help
AMD Picasso support
if SOC_AMD_PICASSO
config CHIPSET_DEVICETREE
string

11
src/soc/amd/stoneyridge/Kconfig
View File

@ -2,13 +2,6 @@
config SOC_AMD_STONEYRIDGE
bool
help
AMD support for SOCs in Family 15h Models 60h-6Fh and Models 70h-7Fh.
if SOC_AMD_STONEYRIDGE
config CPU_SPECIFIC_OPTIONS
def_bool y
select ACPI_SOC_NVS
select ARCH_X86
select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH
@ -51,6 +44,10 @@ config CPU_SPECIFIC_OPTIONS
select TSC_SYNC_LFENCE
select USE_DDR4
select X86_AMD_FIXED_MTRRS
help
AMD support for SOCs in Family 15h Models 60h-6Fh and Models 70h-7Fh.
if SOC_AMD_STONEYRIDGE
config AMD_APU_STONEYRIDGE
bool