dont know what happened here

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1293 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Greg Watson 2003-11-17 20:55:54 +00:00
parent 7c48c5bb1d
commit 3d099e7fac
1 changed files with 28 additions and 20 deletions

View File

@ -1,9 +1,17 @@
uses HAVE_MP_TABLE uses HAVE_MP_TABLE
uses HAVE_PIRQ_TABLE uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
uses HAVE_HARD_RESET
uses HAVE_OPTION_TABLE
uses USE_OPTION_TABLE
uses CONFIG_ROM_STREAM
uses IRQ_SLOT_COUNT
uses MAINBOARD uses MAINBOARD
uses ARCH uses ARCH
uses FALLBACK_SIZE uses FALLBACK_SIZE
uses STACK_SIZE
uses HEAP_SIZE
uses ROM_SIZE uses ROM_SIZE
uses ROM_SECTION_SIZE uses ROM_SECTION_SIZE
uses ROM_IMAGE_SIZE uses ROM_IMAGE_SIZE
@ -26,76 +34,76 @@ default ROM_SIZE = 256*1024
## ##
## Build code for the fallback boot ## Build code for the fallback boot
## ##
option HAVE_FALLBACK_BOOT=1 default HAVE_FALLBACK_BOOT=1
## ##
## no MP table ## no MP table
## ##
option HAVE_MP_TABLE=0 default HAVE_MP_TABLE=0
## ##
## Build code to reset the motherboard from linuxBIOS ## Build code to reset the motherboard from linuxBIOS
## ##
option HAVE_HARD_RESET=1 default HAVE_HARD_RESET=1
## ##
## Build code to export a programmable irq routing table ## Build code to export a programmable irq routing table
## ##
option HAVE_PIRQ_TABLE=1 default HAVE_PIRQ_TABLE=1
option IRQ_SLOT_COUNT=5 default IRQ_SLOT_COUNT=5
object irq_tables.o object irq_tables.o
## ##
## Build code to export a CMOS option table ## Build code to export a CMOS option table
## ##
option HAVE_OPTION_TABLE=1 default HAVE_OPTION_TABLE=1
### ###
### LinuxBIOS layout values ### LinuxBIOS layout values
### ###
## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy. ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
option ROM_IMAGE_SIZE = 65536 default ROM_IMAGE_SIZE = 65536
## ##
## Use a small 8K stack ## Use a small 8K stack
## ##
option STACK_SIZE=0x2000 default STACK_SIZE=0x2000
## ##
## Use a small 16K heap ## Use a small 16K heap
## ##
option HEAP_SIZE=0x4000 default HEAP_SIZE=0x4000
## ##
## Only use the option table in a normal image ## Only use the option table in a normal image
## ##
option USE_OPTION_TABLE = !USE_FALLBACK_IMAGE default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
## ##
## Compute the location and size of where this firmware image ## Compute the location and size of where this firmware image
## (linuxBIOS plus bootloader) will live in the boot rom chip. ## (linuxBIOS plus bootloader) will live in the boot rom chip.
## ##
if USE_FALLBACK_IMAGE if USE_FALLBACK_IMAGE
option ROM_SECTION_SIZE = FALLBACK_SIZE default ROM_SECTION_SIZE = FALLBACK_SIZE
option ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
else else
option ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
option ROM_SECTION_OFFSET = 0 default ROM_SECTION_OFFSET = 0
end end
## ##
## Compute the start location and size size of ## Compute the start location and size size of
## The linuxBIOS bootloader. ## The linuxBIOS bootloader.
## ##
option PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
option CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
option CONFIG_ROM_STREAM = 1 default CONFIG_ROM_STREAM = 1
## ##
## Compute where this copy of linuxBIOS will start in the boot rom ## Compute where this copy of linuxBIOS will start in the boot rom
## ##
option _ROMBASE = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE ) default _ROMBASE = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE )
## ##
## Compute a range of ROM that can cached to speed up linuxBIOS, ## Compute a range of ROM that can cached to speed up linuxBIOS,
@ -104,8 +112,8 @@ option _ROMBASE = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE )
## XIP_ROM_SIZE must be a power of 2. ## XIP_ROM_SIZE must be a power of 2.
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE ## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
## ##
option XIP_ROM_SIZE=65536 default XIP_ROM_SIZE=65536
option XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
## ##
## Set all of the defaults for an x86 architecture ## Set all of the defaults for an x86 architecture