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soc/intel/denverton_ns: Remove variable set but not used 

Change-Id: Ic04231525c1aaaf3afc8c11cddc409b1f5b46743
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32913
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: David Guckian
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Elyes HAOUAS 2019-05-21 21:35:02 +02:00 committed by Patrick Georgi
parent dedf66ecdf
commit 3d23890c65
1 changed files with 0 additions and 2 deletions
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2
src/soc/intel/denverton_ns/cpu.c
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@ -38,7 +38,6 @@ static struct smm_relocation_attrs relo_attrs;
static void dnv_configure_mca(void) static void dnv_configure_mca(void)
{ {
msr_t msr; msr_t msr;
int num_banks;
struct cpuid_result cpuid_regs; struct cpuid_result cpuid_regs;
/* Check feature flag in CPUID.(EAX=1):EDX[7]==1 MCE /* Check feature flag in CPUID.(EAX=1):EDX[7]==1 MCE
@ -48,7 +47,6 @@ static void dnv_configure_mca(void)
return; return;
msr = rdmsr(IA32_MCG_CAP); msr = rdmsr(IA32_MCG_CAP);
num_banks = msr.lo & IA32_MCG_CAP_COUNT_MASK;
if (msr.lo & IA32_MCG_CAP_CTL_P_MASK) { if (msr.lo & IA32_MCG_CAP_CTL_P_MASK) {
/* Enable all error logging */ /* Enable all error logging */
msr.lo = msr.hi = 0xffffffff; msr.lo = msr.hi = 0xffffffff;