From 3d27705d2741d9406409e8f18c4b4b47ca3e5a1a Mon Sep 17 00:00:00 2001 From: Sridhar Siricilla Date: Thu, 6 Feb 2020 14:21:49 +0530 Subject: [PATCH] soc/intel/{skl, common}: Move ME Firmware SKU Types to common code 1. Move ME firmware SKU types into common code. 2. Define ME_HFS3_FW_SKU_CUSTOM SKU. TEST=Verified on hatch & soraka. Change-Id: Iaa4cf8d5b41c1008da1e7aa63b5a6960bb9a727b Signed-off-by: Sridhar Siricilla Reviewed-on: https://review.coreboot.org/c/coreboot/+/38796 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- src/soc/intel/common/block/include/intelblocks/cse.h | 5 +++++ src/soc/intel/skylake/include/soc/me.h | 3 --- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h index aff330a815..6f8f4ff34c 100644 --- a/src/soc/intel/common/block/include/intelblocks/cse.h +++ b/src/soc/intel/common/block/include/intelblocks/cse.h @@ -41,6 +41,11 @@ #define ME_HFS1_COM_SOFT_TEMP_DISABLE 0x3 #define ME_HFS1_COM_SECOVER_MEI_MSG 0x5 +/* ME Firmware SKU Types */ +#define ME_HFS3_FW_SKU_CONSUMER 0x2 +#define ME_HFS3_FW_SKU_CORPORATE 0x3 +#define ME_HFS3_FW_SKU_CUSTOM 0x5 + /* HFSTS register offsets in PCI config space */ enum { PCI_ME_HFSTS1 = 0x40, diff --git a/src/soc/intel/skylake/include/soc/me.h b/src/soc/intel/skylake/include/soc/me.h index 30de2197f5..e8de30dde9 100644 --- a/src/soc/intel/skylake/include/soc/me.h +++ b/src/soc/intel/skylake/include/soc/me.h @@ -168,9 +168,6 @@ union me_hfs2 { } __packed fields; }; -#define ME_HFS3_FW_SKU_CONSUMER 0x2 -#define ME_HFS3_FW_SKU_CORPORATE 0x3 - union me_hfs3 { u32 data; struct {