soc/amd/stoneyridge/northbridge.c: Fix bit definitions
The latest public BKDG (3.6) releases some previously undefined (reserved) bits. Fix these definitions, including the header file where they are defined. BUG=b:77940747 TEST=Build and boot grunt. Change-Id: Icb5334110248d7806421200a161fa3befefcea8a Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/25665 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -20,6 +20,10 @@
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#include <arch/io.h>
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#include <arch/io.h>
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#include <device/device.h>
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#include <device/device.h>
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/* D1F1 - HDA Configuration Registers */
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#define HDA_DEV_CTRL_STATUS 0x60
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#define HDA_NO_SNOOP_EN BIT(11)
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/* D18F0 - HT Configuration Registers */
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/* D18F0 - HT Configuration Registers */
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#define D18F0_NODE_ID 0x60
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#define D18F0_NODE_ID 0x60
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#define D18F0_CPU_CNT 0x62 /* BKDG defines as a field in DWORD 0x60 */
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#define D18F0_CPU_CNT 0x62 /* BKDG defines as a field in DWORD 0x60 */
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@ -363,9 +363,9 @@ void fam15_finalize(void *chip_info)
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/* disable No Snoop */
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/* disable No Snoop */
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dev = dev_find_slot(0, HDA0_DEVFN);
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dev = dev_find_slot(0, HDA0_DEVFN);
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value = pci_read_config32(dev, 0x60);
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value = pci_read_config32(dev, HDA_DEV_CTRL_STATUS);
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value &= ~(1 << 11);
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value &= ~HDA_NO_SNOOP_EN;
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pci_write_config32(dev, 0x60, value);
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pci_write_config32(dev, HDA_DEV_CTRL_STATUS, value);
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}
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}
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void domain_read_resources(device_t dev)
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void domain_read_resources(device_t dev)
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