vendorcode/amd/opensil/genoa_poc: add opensil_fill_fadt_io_ports
Add the opensil_fill_fadt_io_ports function to fill in the ACPI I/O ports in FADT that openSIL configured. Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Change-Id: I154a162cc8e048cadab693c0755e96c71a62983c Reviewed-on: https://review.coreboot.org/c/coreboot/+/76529 Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -8,6 +8,7 @@ CPPFLAGS_romstage += -I$(opensil_dir)/Include -I$(opensil_dir)/xUSL -I$(opensil_
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romstage-y += opensil_console.c
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romstage-y += romstage.c
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ramstage-y += acpi.c
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ramstage-y += memmap.c
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ramstage-y += opensil_console.c
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ramstage-y += ramstage.c
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@ -0,0 +1,18 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <acpi/acpi.h>
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#include <Sil-api.h>
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#include <SilCommon.h>
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#include <xSIM-api.h>
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#include <FCH/Common/FchCommonCfg.h>
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#include "opensil.h"
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void opensil_fill_fadt_io_ports(acpi_fadt_t *fadt)
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{
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FCHHWACPI_INPUT_BLK *blk = SilFindStructure(SilId_FchHwAcpiP, 0);
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fadt->pm1a_evt_blk = blk->AcpiPm1EvtBlkAddr;
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fadt->pm1a_cnt_blk = blk->AcpiPm1CntBlkAddr;
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fadt->pm_tmr_blk = blk->AcpiPmTmrBlkAddr;
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fadt->gpe0_blk = blk->AcpiGpe0BlkAddr;
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}
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@ -9,6 +9,6 @@ void SIL_STATUS_report(const char *function, const int status);
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// Add the memory map to dev, starting at index idx, returns last use idx
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int add_opensil_memmap(struct device *dev, int idx);
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// Fill in FADT from opensil
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void opensil_fill_fadt(acpi_fadt_t *fadt);
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void opensil_fill_fadt_io_ports(acpi_fadt_t *fadt);
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#endif
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