From 3d4ff8498c0b607770194eaf716ebd55493d8333 Mon Sep 17 00:00:00 2001
From: Subrata Banik <subratabanik@google.com>
Date: Tue, 4 Jul 2023 08:18:12 +0530
Subject: [PATCH] mb/google/rex/var/ovis: Add Power Limit for 28W

This patch adds a power limit for Ovis with 28W Intel Meteor Lake
silicon.

Reference: Intel MTL-UH_Power_Map_Rev1p2, doc: 640982

BUG=b:289854108
TEST=Able to boot google/ovis with power limit being overridden as
appropriate to 28W.

Change-Id: I312c70720fd89261c53d5bd4f45236e829d6c790
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76229
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
---
 .../rex/variants/baseboard/ovis/Makefile.inc  |  2 ++
 .../rex/variants/baseboard/ovis/ramstage.c    | 28 +++++++++++++++++++
 2 files changed, 30 insertions(+)
 create mode 100644 src/mainboard/google/rex/variants/baseboard/ovis/ramstage.c

diff --git a/src/mainboard/google/rex/variants/baseboard/ovis/Makefile.inc b/src/mainboard/google/rex/variants/baseboard/ovis/Makefile.inc
index fd45b948ff..bb3620adae 100644
--- a/src/mainboard/google/rex/variants/baseboard/ovis/Makefile.inc
+++ b/src/mainboard/google/rex/variants/baseboard/ovis/Makefile.inc
@@ -1 +1,3 @@
 romstage-y += memory.c
+
+ramstage-y += ramstage.c
diff --git a/src/mainboard/google/rex/variants/baseboard/ovis/ramstage.c b/src/mainboard/google/rex/variants/baseboard/ovis/ramstage.c
new file mode 100644
index 0000000000..5955b2adc4
--- /dev/null
+++ b/src/mainboard/google/rex/variants/baseboard/ovis/ramstage.c
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/variants.h>
+#include <device/pci_ids.h>
+#include <intelblocks/power_limit.h>
+
+/*
+ * SKU_ID, TDP (Watts), pl1_min (milliWatts), pl1_max (milliWatts),
+ * pl2_min (milliWatts), pl2_max (milliWatts), pl4 (milliWatts)
+ * Following values are for performance config as per document #640982
+ */
+const struct cpu_tdp_power_limits limits[] = {
+	{
+		.mch_id = PCI_DID_INTEL_MTL_P_ID_1,
+		.cpu_tdp = 28,
+		.pl1_min_power = 19000,
+		.pl1_max_power = 28000,
+		.pl2_min_power = 64000,
+		.pl2_max_power = 64000,
+		.pl4_power = 120000
+	},
+};
+
+void variant_devtree_update(void)
+{
+	size_t total_entries = ARRAY_SIZE(limits);
+	variant_update_cpu_power_limits(limits, total_entries);
+}