mb/google/oak: Clean up TPM Kconfig
Rowan was the only Oak variant that used TPM2. However, it was removed
in commit 0aa1f9e905
(google/oak: Delete rowan). Since the other three
variants use TPM1, remove now-unnecessary Kconfig options from Oak.
Change-Id: If19df00463f63f1101475f59b5ecea5a9724a9ab
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50907
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
parent
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commit
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@ -5,18 +5,6 @@ config BOARD_GOOGLE_OAK_COMMON
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if BOARD_GOOGLE_OAK_COMMON
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if BOARD_GOOGLE_OAK_COMMON
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config OTHERS_HAVE_TPM1
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bool
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default y
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select MAINBOARD_HAS_I2C_TPM_GENERIC
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select MAINBOARD_HAS_TPM1
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config OAK_HAS_TPM2
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bool
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default n
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select MAINBOARD_HAS_I2C_TPM_CR50
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select MAINBOARD_HAS_TPM2
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config BOARD_SPECIFIC_OPTIONS
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config BOARD_SPECIFIC_OPTIONS
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def_bool y
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def_bool y
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select SOC_MEDIATEK_MT8173
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select SOC_MEDIATEK_MT8173
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@ -25,6 +13,8 @@ config BOARD_SPECIFIC_OPTIONS
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select DRIVER_PARADE_PS8640
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select DRIVER_PARADE_PS8640
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC_SPI
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select EC_GOOGLE_CHROMEEC_SPI
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select MAINBOARD_HAS_I2C_TPM_GENERIC
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select MAINBOARD_HAS_TPM1
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select MAINBOARD_HAS_NATIVE_VGA_INIT
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select MAINBOARD_HAS_NATIVE_VGA_INIT
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select MAINBOARD_FORCE_NATIVE_VGA_INIT
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select MAINBOARD_FORCE_NATIVE_VGA_INIT
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select HAVE_LINEAR_FRAMEBUFFER
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select HAVE_LINEAR_FRAMEBUFFER
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@ -49,8 +39,7 @@ config DRIVER_TPM_I2C_BUS
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config DRIVER_TPM_I2C_ADDR
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config DRIVER_TPM_I2C_ADDR
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hex
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hex
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default 0x20 if !OAK_HAS_TPM2
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default 0x20
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default 0x50 if OAK_HAS_TPM2
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config BOOT_DEVICE_SPI_FLASH_BUS
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config BOOT_DEVICE_SPI_FLASH_BUS
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int
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int
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@ -73,9 +73,6 @@ void bootblock_mainboard_init(void)
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/* Init i2c bus 2 Timing register for TPM */
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/* Init i2c bus 2 Timing register for TPM */
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mtk_i2c_bus_init(CONFIG_DRIVER_TPM_I2C_BUS);
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mtk_i2c_bus_init(CONFIG_DRIVER_TPM_I2C_BUS);
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if (CONFIG(OAK_HAS_TPM2))
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gpio_eint_configure(CR50_IRQ, IRQ_TYPE_EDGE_RISING);
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mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD1_MASK, 6*MHz,
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mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD1_MASK, 6*MHz,
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0);
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0);
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