northbridge/intel/i440bx: Unify UDELAY selection

Instead of manually including udelay_io.c in each romstage,
select UDELAY_IO for all i440BX boards in the chipset.

Change-Id: I411191927f3fba1d0749edcf79378e8013fb195a
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/13781
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

src/cpu/intel/socket_PGA370/Kconfig

@@ -17,7 +17,6 @@ config CPU_INTEL_SOCKET_PGA370
 	bool
 	select CPU_INTEL_MODEL_6XX
 	select MMX
-	select UDELAY_TSC
 
 if CPU_INTEL_SOCKET_PGA370
 

src/drivers/pc80/Makefile.inc

@@ -5,6 +5,7 @@ ramstage-$(CONFIG_DRIVERS_MC146818) += mc146818rtc.c
 ramstage-y += isa-dma.c
 ramstage-y += i8254.c
 ramstage-y += i8259.c
+romstage-$(CONFIG_UDELAY_IO) += udelay_io.c
 ramstage-$(CONFIG_UDELAY_IO) += udelay_io.c
 ramstage-y += keyboard.c
 ramstage-$(CONFIG_SPKMODEM) += spkmodem.c

src/mainboard/a-trend/atc-6220/Kconfig

@@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SOUTHBRIDGE_INTEL_I82371EB
 	select SUPERIO_WINBOND_W83977TF
 	select HAVE_PIRQ_TABLE
-	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_256
 
 config MAINBOARD_DIR

src/mainboard/a-trend/atc-6220/romstage.c

@@ -22,7 +22,6 @@
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>
-#include "drivers/pc80/udelay_io.c"
 #include <delay.h>
 #include <cpu/x86/bist.h>
 #include <superio/winbond/common/winbond.h>

src/mainboard/a-trend/atc-6240/Kconfig

@@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SOUTHBRIDGE_INTEL_I82371EB
 	select SUPERIO_WINBOND_W83627HF
 	select HAVE_PIRQ_TABLE
-	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_256
 
 config MAINBOARD_DIR

src/mainboard/a-trend/atc-6240/romstage.c

@@ -22,7 +22,6 @@
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>
-#include "drivers/pc80/udelay_io.c"
 #include <delay.h>
 #include <cpu/x86/bist.h>
 #include <superio/winbond/common/winbond.h>

src/mainboard/abit/be6-ii_v2_0/Kconfig

@@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SOUTHBRIDGE_INTEL_I82371EB
 	select SUPERIO_WINBOND_W83977TF
 	select HAVE_PIRQ_TABLE
-	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_256
 
 config MAINBOARD_DIR

src/mainboard/abit/be6-ii_v2_0/romstage.c

@@ -22,7 +22,6 @@
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>
-#include "drivers/pc80/udelay_io.c"
 #include <delay.h>
 #include <cpu/x86/bist.h>
 #include <superio/winbond/common/winbond.h>

src/mainboard/asus/p2b-d/Kconfig

@@ -24,7 +24,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select HAVE_MP_TABLE
 	select SMP
 	select IOAPIC
-	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_256
 	select SDRAMPWR_4DIMM
 

src/mainboard/asus/p2b-d/romstage.c

@@ -22,7 +22,6 @@
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>
-#include "drivers/pc80/udelay_io.c"
 #include <delay.h>
 #include <cpu/x86/bist.h>
 #include <superio/winbond/common/winbond.h>

src/mainboard/asus/p2b-ds/Kconfig

@@ -24,7 +24,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select HAVE_MP_TABLE
 	select SMP
 	select IOAPIC
-	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_256
 	select SDRAMPWR_4DIMM
 

src/mainboard/asus/p2b-ds/romstage.c

@@ -22,7 +22,6 @@
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>
-#include "drivers/pc80/udelay_io.c"
 #include <delay.h>
 #include <cpu/x86/bist.h>
 #include <superio/winbond/common/winbond.h>

src/mainboard/asus/p2b-f/Kconfig

@@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SOUTHBRIDGE_INTEL_I82371EB
 	select SUPERIO_WINBOND_W83977TF
 	select HAVE_PIRQ_TABLE
-	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_256
 
 config MAINBOARD_DIR

src/mainboard/asus/p2b-f/romstage.c

@@ -22,7 +22,6 @@
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>
-#include "drivers/pc80/udelay_io.c"
 #include <delay.h>
 #include <cpu/x86/bist.h>
 #include <superio/winbond/common/winbond.h>

src/mainboard/asus/p2b-ls/Kconfig

@@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SOUTHBRIDGE_INTEL_I82371EB
 	select SUPERIO_WINBOND_W83977TF
 	select HAVE_PIRQ_TABLE
-	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_256
 	select SDRAMPWR_4DIMM
 

src/mainboard/asus/p2b-ls/romstage.c

@@ -22,7 +22,6 @@
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>
-#include "drivers/pc80/udelay_io.c"
 #include <delay.h>
 #include <cpu/x86/bist.h>
 #include <superio/winbond/common/winbond.h>

src/mainboard/asus/p2b/Kconfig

@@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SOUTHBRIDGE_INTEL_I82371EB
 	select SUPERIO_WINBOND_W83977TF
 	select HAVE_PIRQ_TABLE
-	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_256
 	select HAVE_ACPI_TABLES
 

src/mainboard/asus/p2b/romstage.c

@@ -22,7 +22,6 @@
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>
-#include "drivers/pc80/udelay_io.c"
 #include <delay.h>
 #include <cpu/x86/bist.h>
 #include <superio/winbond/common/winbond.h>

src/mainboard/asus/p3b-f/Kconfig

@@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SOUTHBRIDGE_INTEL_I82371EB
 	select SUPERIO_WINBOND_W83977TF
 	select HAVE_PIRQ_TABLE
-	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_256
 	select SDRAMPWR_4DIMM
 

src/mainboard/asus/p3b-f/romstage.c

@@ -22,7 +22,6 @@
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>
-#include "drivers/pc80/udelay_io.c"
 #include <delay.h>
 #include <cpu/x86/bist.h>
 #include <superio/winbond/common/winbond.h>

src/mainboard/azza/pt-6ibd/Kconfig

@@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SOUTHBRIDGE_INTEL_I82371EB
 	select SUPERIO_WINBOND_W83977TF
 	select HAVE_PIRQ_TABLE
-	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_256
 
 config MAINBOARD_DIR

src/mainboard/azza/pt-6ibd/romstage.c

@@ -22,7 +22,6 @@
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>
-#include "drivers/pc80/udelay_io.c"
 #include <delay.h>
 #include <cpu/x86/bist.h>
 #include <superio/winbond/common/winbond.h>

src/mainboard/biostar/m6tba/Kconfig

@@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SOUTHBRIDGE_INTEL_I82371EB
 	select SUPERIO_SMSC_SMSCSUPERIO
 	select HAVE_PIRQ_TABLE
-	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_256
 
 config MAINBOARD_DIR

src/mainboard/biostar/m6tba/romstage.c

@@ -22,7 +22,6 @@
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>
-#include "drivers/pc80/udelay_io.c"
 #include <delay.h>
 #include <cpu/x86/bist.h>
 #include <superio/smsc/smscsuperio/smscsuperio.h>

src/mainboard/compaq/deskpro_en_sff_p600/Kconfig

@@ -22,7 +22,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	# should be SUPERIO_NSC_PC97307!
 	select SUPERIO_NSC_PC97317
 	select HAVE_PIRQ_TABLE
-	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_256
 
 config MAINBOARD_DIR

src/mainboard/compaq/deskpro_en_sff_p600/romstage.c

@@ -22,7 +22,6 @@
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>
-#include "drivers/pc80/udelay_io.c"
 #include <delay.h>
 #include <cpu/x86/bist.h>
 /* FIXME: This should be PC97307 (but it's buggy at the moment)! */

src/mainboard/emulation/qemu-i440fx/romstage.c

@@ -22,7 +22,6 @@
 #include <console/console.h>
 #include <cpu/x86/bist.h>
 #include <timestamp.h>
-#include "drivers/pc80/udelay_io.c"
 #include <delay.h>
 #include <cpu/x86/lapic.h>
 

src/mainboard/emulation/qemu-q35/romstage.c

@@ -23,7 +23,6 @@
 #include <southbridge/intel/i82801ix/i82801ix.h>
 #include <cpu/x86/bist.h>
 #include <timestamp.h>
-#include "drivers/pc80/udelay_io.c"
 #include <delay.h>
 #include <cpu/x86/lapic.h>
 

src/mainboard/gigabyte/ga-6bxc/Kconfig

@@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SOUTHBRIDGE_INTEL_I82371EB
 	select SUPERIO_ITE_IT8671F
 	select HAVE_PIRQ_TABLE
-	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_256
 
 config MAINBOARD_DIR

src/mainboard/gigabyte/ga-6bxc/romstage.c

@@ -22,7 +22,6 @@
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>
-#include "drivers/pc80/udelay_io.c"
 #include <delay.h>
 #include <cpu/x86/bist.h>
 #include <superio/ite/it8671f/it8671f.h>

src/mainboard/gigabyte/ga-6bxe/Kconfig

@@ -22,7 +22,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SOUTHBRIDGE_INTEL_I82371EB
 	select SUPERIO_ITE_IT8671F
 	select HAVE_PIRQ_TABLE
-	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_256
 	select SDRAMPWR_4DIMM
 

src/mainboard/gigabyte/ga-6bxe/romstage.c

@@ -22,7 +22,6 @@
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>
-#include "drivers/pc80/udelay_io.c"
 #include <delay.h>
 #include <cpu/x86/bist.h>
 #include <superio/ite/it8671f/it8671f.h>

src/mainboard/lanner/em8510/romstage.c

@@ -23,7 +23,6 @@
 #include <stdlib.h>
 #include <lib.h>
 #include <spd.h>
-#include "drivers/pc80/udelay_io.c"
 #include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include <southbridge/intel/i82801dx/i82801dx.h>

src/mainboard/msi/ms6119/Kconfig

@@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SOUTHBRIDGE_INTEL_I82371EB
 	select SUPERIO_WINBOND_W83977TF
 	select HAVE_PIRQ_TABLE
-	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_256
 
 config MAINBOARD_DIR

src/mainboard/msi/ms6119/romstage.c

@@ -22,7 +22,6 @@
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>
-#include "drivers/pc80/udelay_io.c"
 #include <delay.h>
 #include <cpu/x86/bist.h>
 #include <superio/winbond/common/winbond.h>

src/mainboard/msi/ms6147/Kconfig

@@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SOUTHBRIDGE_INTEL_I82371EB
 	select SUPERIO_WINBOND_W83977TF
 	select HAVE_PIRQ_TABLE
-	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_256
 
 config MAINBOARD_DIR

src/mainboard/msi/ms6147/romstage.c

@@ -22,7 +22,6 @@
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>
-#include "drivers/pc80/udelay_io.c"
 #include <delay.h>
 #include <cpu/x86/bist.h>
 #include <superio/winbond/common/winbond.h>

src/mainboard/msi/ms6156/Kconfig

@@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SOUTHBRIDGE_INTEL_I82371EB
 	select SUPERIO_WINBOND_W83977TF
 	select HAVE_PIRQ_TABLE
-	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_256
 
 config MAINBOARD_DIR

src/mainboard/msi/ms6156/romstage.c

@@ -22,7 +22,6 @@
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>
-#include "drivers/pc80/udelay_io.c"
 #include <delay.h>
 #include <cpu/x86/bist.h>
 #include <superio/winbond/common/winbond.h>

src/mainboard/msi/ms6178/romstage.c

@@ -25,7 +25,6 @@
 #include <northbridge/intel/i82810/raminit.h>
 #include <cpu/x86/bist.h>
 #include <southbridge/intel/i82801ax/i82801ax.h>
-#include "drivers/pc80/udelay_io.c"
 #include <lib.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)

src/mainboard/nokia/ip530/Kconfig

@@ -25,7 +25,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select BOARD_ROMSIZE_KB_512
 	select PIRQ_ROUTE
 	select HAVE_PIRQ_TABLE
-	select UDELAY_TSC
 	select SDRAMPWR_4DIMM
 
 config MAINBOARD_DIR

src/mainboard/nokia/ip530/romstage.c

@@ -22,7 +22,6 @@
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>
-#include "drivers/pc80/udelay_io.c"
 #include <delay.h>
 #include <cpu/x86/bist.h>
 #include <superio/smsc/smscsuperio/smscsuperio.h>

src/mainboard/soyo/sy-6ba-plus-iii/Kconfig

@@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SOUTHBRIDGE_INTEL_I82371EB
 	select SUPERIO_ITE_IT8671F
 	select HAVE_PIRQ_TABLE
-	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_256
 
 config MAINBOARD_DIR

src/mainboard/soyo/sy-6ba-plus-iii/romstage.c

@@ -22,7 +22,6 @@
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>
-#include "drivers/pc80/udelay_io.c"
 #include <delay.h>
 #include <cpu/x86/bist.h>
 #include <superio/ite/it8671f/it8671f.h>

src/mainboard/tyan/s1846/Kconfig

@@ -20,7 +20,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select NORTHBRIDGE_INTEL_I440BX
 	select SOUTHBRIDGE_INTEL_I82371EB
 	select SUPERIO_NSC_PC87309
-	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_256
 
 config MAINBOARD_DIR

src/mainboard/tyan/s1846/romstage.c

@@ -22,7 +22,6 @@
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>
-#include "drivers/pc80/udelay_io.c"
 #include <delay.h>
 #include <cpu/x86/bist.h>
 #include <superio/nsc/pc87309/pc87309.h>

src/northbridge/intel/i440bx/Kconfig

@@ -17,6 +17,7 @@ config NORTHBRIDGE_INTEL_I440BX
 	bool
 	select HAVE_DEBUG_RAM_SETUP
 	select LATE_CBMEM_INIT
+	select UDELAY_IO
 
 config SDRAMPWR_4DIMM
 	bool