soc/intel/cannonlake: Fix chipset_power_state structure
This structure is declared as a static CAR_GLOBAL in the common PMC library code and in the SOC specific code. Remove the SOC specific version and instead get the chipset_power_state pointer from the PMC library. This fixes events that were recorded in chipset_power_state at boot but were reading as all zero when it was time to parse the structure when logging events to flash. Change-Id: I67a4f724c0707d98766ad28abd8d0b66a5615745 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/c/30717 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
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@ -33,8 +33,6 @@
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#include <string.h>
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#include <timestamp.h>
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static struct chipset_power_state power_state CAR_GLOBAL;
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#define FSP_SMBIOS_MEMORY_INFO_GUID \
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{ \
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0xd4, 0x71, 0x20, 0x9b, 0x54, 0xb0, 0x0c, 0x4e, \
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@ -112,7 +110,7 @@ asmlinkage void car_stage_entry(void)
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bool s3wake;
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struct postcar_frame pcf;
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uintptr_t top_of_ram;
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struct chipset_power_state *ps = car_get_var_ptr(&power_state);
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struct chipset_power_state *ps = pmc_get_power_state();
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console_init();
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