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nb/amd/amdmct/mct/mctdqs_d.c: Remove variable set but not used 

Change-Id: I45f32ea1ebf59a20d475dfad2d9d0980dec6918b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32940
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Elyes HAOUAS 2019-05-22 20:11:49 +02:00 committed by Patrick Georgi
parent 502008d5dc
commit 3dbfb2bef9
1 changed files with 1 additions and 3 deletions
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4
src/northbridge/amd/amdmct/mct/mctdqs_d.c
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@ -1192,8 +1192,6 @@ void mct_Write1LTestPattern_D(struct MCTStatStruc *pMCTstat,
void mct_Read1LTestPattern_D(struct MCTStatStruc *pMCTstat, void mct_Read1LTestPattern_D(struct MCTStatStruc *pMCTstat,
struct DCTStatStruc *pDCTstat, u32 addr) struct DCTStatStruc *pDCTstat, u32 addr)
{ {
u32 value;
/* BIOS issues the remaining (Ntrain - 2) reads after checking that /* BIOS issues the remaining (Ntrain - 2) reads after checking that
* F2x11C[PrefDramTrainMode] is cleared. These reads must be to * F2x11C[PrefDramTrainMode] is cleared. These reads must be to
* consecutive cache lines (i.e., 64 bytes apart) and must not cross * consecutive cache lines (i.e., 64 bytes apart) and must not cross
@ -1205,5 +1203,5 @@ void mct_Read1LTestPattern_D(struct MCTStatStruc *pMCTstat,
SetUpperFSbase(addr); SetUpperFSbase(addr);
/* 1st move causes read fill (to exclusive or shared)*/ /* 1st move causes read fill (to exclusive or shared)*/
value = read32_fs(addr << 8); read32_fs(addr << 8);
} }