mediatek/mt8183: Add a stub implementation of the MT8183 SOC

Most things still need to be filled in, but this will allow us to build
boards which use this SOC.

BUG=b:80501386
BRANCH=none
TEST=timer and uart work fine

Change-Id: Ie81fa56ffce85188e1f9e979f9b0e64b764c2627
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/26659
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/mediatek/mt8183/Kconfig

@@ -0,0 +1,21 @@
+config SOC_MEDIATEK_MT8183
+	bool
+	default n
+	select ARCH_BOOTBLOCK_ARMV8_64
+	select ARCH_RAMSTAGE_ARMV8_64
+	select ARCH_ROMSTAGE_ARMV8_64
+	select ARCH_VERSTAGE_ARMV8_64
+	select ARM64_USE_ARM_TRUSTED_FIRMWARE
+	select BOOTBLOCK_CONSOLE
+	select GENERIC_UDELAY
+	select HAVE_UART_SPECIAL
+	select HAVE_MONOTONIC_TIMER
+
+if SOC_MEDIATEK_MT8183
+
+config VBOOT
+	select VBOOT_OPROM_MATTERS
+	select VBOOT_STARTS_IN_BOOTBLOCK
+	select VBOOT_SEPARATE_VERSTAGE
+
+endif

src/soc/mediatek/mt8183/Makefile.inc

@@ -0,0 +1,32 @@
+ifeq ($(CONFIG_SOC_MEDIATEK_MT8183),y)
+
+bootblock-$(CONFIG_SPI_FLASH) += flash_controller.c
+bootblock-$(CONFIG_SPI_FLASH) += spi.c
+bootblock-y += ../common/timer.c
+ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
+bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c
+endif
+
+verstage-$(CONFIG_SPI_FLASH) += flash_controller.c
+verstage-$(CONFIG_SPI_FLASH) += spi.c
+verstage-y += ../common/timer.c
+verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
+
+romstage-$(CONFIG_SPI_FLASH) += flash_controller.c
+romstage-$(CONFIG_SPI_FLASH) += spi.c
+romstage-y += ../common/timer.c
+romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
+
+ramstage-y += ../common/cbmem.c emi.c
+ramstage-$(CONFIG_SPI_FLASH) += flash_controller.c
+ramstage-$(CONFIG_SPI_FLASH) += spi.c
+ramstage-y += ../common/timer.c
+ramstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
+
+CPPFLAGS_common += -Isrc/soc/mediatek/mt8183/include
+CPPFLAGS_common += -Isrc/soc/mediatek/common/include
+
+$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
+	./util/mtkheader/gen-bl-img.py mt8183 emmc $< $@
+
+endif

src/soc/mediatek/mt8183/emi.c

@@ -0,0 +1,21 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <soc/emi.h>
+
+size_t sdram_size(void)
+{
+	return (size_t)4 * GiB;
+}

src/soc/mediatek/mt8183/flash_controller.c

@@ -0,0 +1,59 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/* this is a spi driver which adapts emmc to fake spi flash */
+
+#include <soc/flash_controller.h>
+#include <spi_flash.h>
+
+static void init_io(void)
+{
+}
+
+static int emmc_adapter_read(const struct spi_flash *flash, u32 addr,
+		size_t len, void *buf)
+{
+	return 0;
+}
+
+static int emmc_adapter_write(const struct spi_flash *flash, u32 addr,
+		size_t len, const void *buf)
+{
+	return 0;
+}
+
+static int emmc_adapter_erase(const struct spi_flash *flash, u32 offset,
+		size_t len)
+{
+	return 0;
+}
+
+const struct spi_flash_ops spi_emmc_flash_ops = {
+	.read = emmc_adapter_read,
+	.write = emmc_adapter_write,
+	.erase = emmc_adapter_erase,
+};
+
+int mtk_spi_flash_probe(const struct spi_slave *spi, struct spi_flash *flash)
+{
+	init_io();
+
+	flash->name = "spi emmc flash controller";
+	flash->sector_size = 0x800;
+	flash->size = CONFIG_ROM_SIZE;
+
+	flash->ops = &spi_emmc_flash_ops;
+	return 0;
+}

src/soc/mediatek/mt8183/include/soc/addressmap.h

@@ -0,0 +1,29 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __SOC_MEDIATEK_MT8183_INCLUDE_SOC_ADDRESSMAP_H__
+#define __SOC_MEDIATEK_MT8183_INCLUDE_SOC_ADDRESSMAP_H__
+
+enum {
+	IO_PHYS		= 0x10000000,
+	DDR_BASE	= 0x40000000
+};
+
+enum {
+	GPT_BASE	= IO_PHYS + 0x00008000,
+	UART0_BASE	= IO_PHYS + 0x01002000,
+};
+
+#endif

src/soc/mediatek/mt8183/include/soc/emi.h

@@ -0,0 +1,24 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef SOC_MEDIATEK_MT8183_EMI_H
+#define SOC_MEDIATEK_MT8183_EMI_H
+
+#include <stdint.h>
+#include <types.h>
+
+size_t sdram_size(void);
+
+#endif

src/soc/mediatek/mt8183/include/soc/flash_controller.h

@@ -0,0 +1,23 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __SOC_MEDIATEK_MT8183_FLASH_CONTROLLER_H__
+#define __SOC_MEDIATEK_MT8183_FLASH_CONTROLLER_H__
+
+#include <spi-generic.h>
+
+int mtk_spi_flash_probe(const struct spi_slave *spi, struct spi_flash *flash);
+
+#endif

src/soc/mediatek/mt8183/include/soc/memlayout.ld

@@ -0,0 +1,56 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <memlayout.h>
+
+#include <arch/header.ld>
+
+/*
+ * SRAM_L2C is the half part of L2 cache that we borrow to be used as SRAM.
+ * It will be returned before starting the ramstage.
+ * SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able.
+ */
+#define SRAM_L2C_START(addr) SYMBOL(sram_l2c, addr)
+#define SRAM_L2C_END(addr) SYMBOL(esram_l2c, addr)
+
+#define DRAM_DMA(addr, size) \
+	REGION(dram_dma, addr, size, 4K) \
+	_ = ASSERT(size % 4K == 0, \
+		"DRAM DMA buffer should be multiple of smallest page size (4K)!");
+
+SECTIONS
+{
+	SRAM_START(0x00100000)
+	VBOOT2_WORK(0x00100000, 12K)
+	PRERAM_CBMEM_CONSOLE(0x00103000, 16K)
+	WATCHDOG_TOMBSTONE(0x00107000, 4)
+	PRERAM_CBFS_CACHE(0x00107004, 16K - 4)
+	TIMESTAMP(0x0010B000, 4K)
+	STACK(0x0010C000, 16K)
+	TTB(0x00110000, 28K)
+	DMA_COHERENT(0x00117000, 4K)
+	SRAM_END(0x00120000)
+
+	SRAM_L2C_START(0x00200000)
+	BOOTBLOCK(0x00201000, 85K)
+	VERSTAGE(0x00217000, 114K)
+	ROMSTAGE(0x00233800, 92K)
+	SRAM_L2C_END(0x00280000)
+
+	DRAM_START(0x40000000)
+	DRAM_DMA(0x40000000, 1M)
+	POSTRAM_CBFS_CACHE(0x40100000, 1M)
+	RAMSTAGE(0x40200000, 256K)
+}

src/soc/mediatek/mt8183/spi.c

@@ -0,0 +1,30 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <soc/flash_controller.h>
+#include <spi-generic.h>
+
+static const struct spi_ctrlr spi_flash_ctrlr = {
+	.max_xfer_size = 65535,
+	.flash_probe = mtk_spi_flash_probe,
+};
+
+const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
+	{
+		.ctrlr = &spi_flash_ctrlr,
+	},
+};
+
+const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map);

util/mtkheader/gen-bl-img.py

@@ -22,57 +22,68 @@ import sys
 import hashlib
 
 def read(path):
-	with open(path, "rb") as f:
+	with open(path, 'rb') as f:
 		return f.read()
 
 def write(path, data):
-	with open(path, "wb") as f:
+	with open(path, 'wb') as f:
 		f.write(data)
 
-def padding(data, size, pattern = '\0'):
+def padding(data, size, pattern='\0'):
 	return data + pattern * (size - len(data))
 
-def align(data, size, pattern = '\0'):
+def align(data, size, pattern='\0'):
 	return padding(data, (len(data) + (size - 1)) & ~(size - 1), pattern)
 
-gfh_infos = {
+def gen_gfh_info(chip, data):
-	'mt8173': struct.pack("44I",
+	entries = {
-	0x014d4d4d, 0x00000038, 0x454c4946, 0x464e495f,
+		'mt8173': 0x000C1000,
-	0x0000004f, 0x00000001, 0x01050001, 0x000C0f50,
+		'mt8183': 0x00201000
-	0xffffffff, 0x00020000, 0x000000a8, 0x00000020,
+	}
-	0x000000B0, 0x00000001, 0x014d4d4d, 0x0001000c,
+
-	0x00000001, 0x034d4d4d, 0x00070064, 0x00001182,
+	gfh_format = '<44I'
-	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	gfh_size = struct.calcsize(gfh_format)
-	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	load_addr = entries[chip] - gfh_size
-	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	load_size = gfh_size + len(data) + hashlib.sha256().digest_size
-	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+
-	0x00000000, 0x00000000, 0x00006400, 0x00001388,
+	gfh = struct.pack(gfh_format,
-	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+		0x014d4d4d, 0x00000038, 0x454c4946, 0x464e495f,
-    )}
+		0x0000004f, 0x00000001, 0x01050001, load_addr,
+		load_size,  0x00020000, 0x000000a8, 0x00000020,
+		0x000000B0, 0x00000001, 0x014d4d4d, 0x0001000c,
+		0x00000001, 0x034d4d4d, 0x00070064, 0x00001182,
+		0x00000000, 0x00000000, 0x00000000, 0x00000000,
+		0x00000000, 0x00000000, 0x00000000, 0x00000000,
+		0x00000000, 0x00000000, 0x00000000, 0x00000000,
+		0x00000000, 0x00000000, 0x00000000, 0x00000000,
+		0x00000000, 0x00000000, 0x00006400, 0x00001388,
+		0x00000000, 0x00000000, 0x00000000, 0x00000000)
+
+	return gfh
 
 def gen_emmc_header(data):
-	header = (padding(struct.pack("<12sII", "EMMC_BOOT", 1, 512), 512, '\xff') +
+	header = (padding(struct.pack('<12sII', 'EMMC_BOOT', 1, 512), 512, '\xff') +
-		  padding(struct.pack("<8sIIIIIIII", "BRLYT", 1, 2048, 2048 + len(data),
+		  padding(struct.pack('<8sIIIIIIII', 'BRLYT', 1, 2048, 2048 + len(data),
-			0x42424242, 0x00010005, 2048, 2048 + len(data), 1) + '\0' * 140, 512, '\xff') +
+			  0x42424242, 0x00010005, 2048, 2048 + len(data), 1) + '\0' * 140, 512,
+			  '\xff') +
 		  '\0' * 1024)
 	return header
 
 def gen_sf_header(data):
-	header = (padding(struct.pack("<12sII", "SF_BOOT", 1, 512), 512, '\xff') +
+	header = (padding(struct.pack('<12sII', 'SF_BOOT', 1, 512), 512, '\xff') +
-		  padding(struct.pack("<8sIIIIIIII", "BRLYT", 1, 2048, 2048 + len(data),
+		  padding(struct.pack('<8sIIIIIIII', 'BRLYT', 1, 2048, 2048 + len(data),
-			0x42424242, 0x00010007, 2048, 2048 + len(data), 1) + '\0' * 140, 512, '\xff') +
+			  0x42424242, 0x00010007, 2048, 2048 + len(data), 1) + '\0' * 140, 512,
+			  '\xff') +
 		  '\0' * 1024)
 	return header
 
 gen_dev_header = {
-	"emmc": gen_emmc_header,
+	'emmc': gen_emmc_header,
-	"sf": gen_sf_header
+	'sf': gen_sf_header
 }
 
 def gen_preloader(chip_ver, flash_type, data):
-	gfh_info = gfh_infos[chip_ver]
+	gfh_info = gen_gfh_info(chip_ver, data)
-	gfh_info = gfh_info[0:32] + struct.pack("1I", len(data)+len(gfh_info)+32) + gfh_info[36:len(gfh_info)]
-
 	gfh_hash = hashlib.sha256(gfh_info + data).digest()
 
 	data = align(gfh_info + data + gfh_hash, 512, '\xff')
@@ -81,12 +92,12 @@ def gen_preloader(chip_ver, flash_type, data):
 
 def main(argv):
 	if len(argv) != 5:
-		print "Usage: %s <chip> <flash_type> <input_file> <output_file>" % argv[0]
+		print 'Usage: %s <chip> <flash_type> <input_file> <output_file>' % argv[0]
-		print "\t flash_type: emmc/sf"
+		print '\t flash_type: emmc|sf'
-		print "\t chip      : mt8173"
+		print '\t chip      : mt8173|mt8183'
 
 		exit(1)
 	write(argv[4], gen_preloader(argv[1], argv[2], read(argv[3])))
 
-if __name__ == "__main__":
+if __name__ == '__main__':
 	main(sys.argv)