mediatek/mt8183: Add a stub implementation of the MT8183 SOC
Most things still need to be filled in, but this will allow us to build boards which use this SOC. BUG=b:80501386 BRANCH=none TEST=timer and uart work fine Change-Id: Ie81fa56ffce85188e1f9e979f9b0e64b764c2627 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/26659 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
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88d3ec222b
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3ddf57e24e
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@ -0,0 +1,21 @@
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config SOC_MEDIATEK_MT8183
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bool
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default n
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select ARCH_BOOTBLOCK_ARMV8_64
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select ARCH_RAMSTAGE_ARMV8_64
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select ARCH_ROMSTAGE_ARMV8_64
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select ARCH_VERSTAGE_ARMV8_64
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select ARM64_USE_ARM_TRUSTED_FIRMWARE
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select BOOTBLOCK_CONSOLE
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select GENERIC_UDELAY
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select HAVE_UART_SPECIAL
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select HAVE_MONOTONIC_TIMER
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if SOC_MEDIATEK_MT8183
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config VBOOT
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select VBOOT_OPROM_MATTERS
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select VBOOT_STARTS_IN_BOOTBLOCK
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select VBOOT_SEPARATE_VERSTAGE
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endif
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@ -0,0 +1,32 @@
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ifeq ($(CONFIG_SOC_MEDIATEK_MT8183),y)
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bootblock-$(CONFIG_SPI_FLASH) += flash_controller.c
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bootblock-$(CONFIG_SPI_FLASH) += spi.c
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bootblock-y += ../common/timer.c
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ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
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bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c
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endif
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verstage-$(CONFIG_SPI_FLASH) += flash_controller.c
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verstage-$(CONFIG_SPI_FLASH) += spi.c
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verstage-y += ../common/timer.c
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verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
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romstage-$(CONFIG_SPI_FLASH) += flash_controller.c
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romstage-$(CONFIG_SPI_FLASH) += spi.c
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romstage-y += ../common/timer.c
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romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
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ramstage-y += ../common/cbmem.c emi.c
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ramstage-$(CONFIG_SPI_FLASH) += flash_controller.c
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ramstage-$(CONFIG_SPI_FLASH) += spi.c
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ramstage-y += ../common/timer.c
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ramstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
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CPPFLAGS_common += -Isrc/soc/mediatek/mt8183/include
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CPPFLAGS_common += -Isrc/soc/mediatek/common/include
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$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
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./util/mtkheader/gen-bl-img.py mt8183 emmc $< $@
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endif
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@ -0,0 +1,21 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2018 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <soc/emi.h>
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size_t sdram_size(void)
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{
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return (size_t)4 * GiB;
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}
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@ -0,0 +1,59 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2018 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/* this is a spi driver which adapts emmc to fake spi flash */
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#include <soc/flash_controller.h>
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#include <spi_flash.h>
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static void init_io(void)
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{
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}
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static int emmc_adapter_read(const struct spi_flash *flash, u32 addr,
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size_t len, void *buf)
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{
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return 0;
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}
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static int emmc_adapter_write(const struct spi_flash *flash, u32 addr,
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size_t len, const void *buf)
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{
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return 0;
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}
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static int emmc_adapter_erase(const struct spi_flash *flash, u32 offset,
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size_t len)
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{
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return 0;
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}
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const struct spi_flash_ops spi_emmc_flash_ops = {
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.read = emmc_adapter_read,
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.write = emmc_adapter_write,
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.erase = emmc_adapter_erase,
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};
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int mtk_spi_flash_probe(const struct spi_slave *spi, struct spi_flash *flash)
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{
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init_io();
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flash->name = "spi emmc flash controller";
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flash->sector_size = 0x800;
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flash->size = CONFIG_ROM_SIZE;
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flash->ops = &spi_emmc_flash_ops;
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return 0;
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}
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@ -0,0 +1,29 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2018 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __SOC_MEDIATEK_MT8183_INCLUDE_SOC_ADDRESSMAP_H__
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#define __SOC_MEDIATEK_MT8183_INCLUDE_SOC_ADDRESSMAP_H__
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enum {
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IO_PHYS = 0x10000000,
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DDR_BASE = 0x40000000
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};
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enum {
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GPT_BASE = IO_PHYS + 0x00008000,
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UART0_BASE = IO_PHYS + 0x01002000,
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};
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#endif
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@ -0,0 +1,24 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2018 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef SOC_MEDIATEK_MT8183_EMI_H
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#define SOC_MEDIATEK_MT8183_EMI_H
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#include <stdint.h>
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#include <types.h>
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size_t sdram_size(void);
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#endif
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2018 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __SOC_MEDIATEK_MT8183_FLASH_CONTROLLER_H__
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#define __SOC_MEDIATEK_MT8183_FLASH_CONTROLLER_H__
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#include <spi-generic.h>
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int mtk_spi_flash_probe(const struct spi_slave *spi, struct spi_flash *flash);
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#endif
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2018 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <memlayout.h>
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#include <arch/header.ld>
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/*
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* SRAM_L2C is the half part of L2 cache that we borrow to be used as SRAM.
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* It will be returned before starting the ramstage.
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* SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able.
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*/
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#define SRAM_L2C_START(addr) SYMBOL(sram_l2c, addr)
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#define SRAM_L2C_END(addr) SYMBOL(esram_l2c, addr)
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#define DRAM_DMA(addr, size) \
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REGION(dram_dma, addr, size, 4K) \
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_ = ASSERT(size % 4K == 0, \
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"DRAM DMA buffer should be multiple of smallest page size (4K)!");
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SECTIONS
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{
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SRAM_START(0x00100000)
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VBOOT2_WORK(0x00100000, 12K)
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PRERAM_CBMEM_CONSOLE(0x00103000, 16K)
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WATCHDOG_TOMBSTONE(0x00107000, 4)
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PRERAM_CBFS_CACHE(0x00107004, 16K - 4)
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TIMESTAMP(0x0010B000, 4K)
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STACK(0x0010C000, 16K)
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TTB(0x00110000, 28K)
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DMA_COHERENT(0x00117000, 4K)
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SRAM_END(0x00120000)
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SRAM_L2C_START(0x00200000)
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BOOTBLOCK(0x00201000, 85K)
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VERSTAGE(0x00217000, 114K)
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ROMSTAGE(0x00233800, 92K)
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SRAM_L2C_END(0x00280000)
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DRAM_START(0x40000000)
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DRAM_DMA(0x40000000, 1M)
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POSTRAM_CBFS_CACHE(0x40100000, 1M)
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RAMSTAGE(0x40200000, 256K)
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}
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2018 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <soc/flash_controller.h>
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#include <spi-generic.h>
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static const struct spi_ctrlr spi_flash_ctrlr = {
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.max_xfer_size = 65535,
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.flash_probe = mtk_spi_flash_probe,
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};
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const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
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{
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.ctrlr = &spi_flash_ctrlr,
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},
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};
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const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map);
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@ -22,57 +22,68 @@ import sys
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import hashlib
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def read(path):
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with open(path, "rb") as f:
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with open(path, 'rb') as f:
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return f.read()
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def write(path, data):
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with open(path, "wb") as f:
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with open(path, 'wb') as f:
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f.write(data)
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def padding(data, size, pattern = '\0'):
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def padding(data, size, pattern='\0'):
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return data + pattern * (size - len(data))
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def align(data, size, pattern = '\0'):
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def align(data, size, pattern='\0'):
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return padding(data, (len(data) + (size - 1)) & ~(size - 1), pattern)
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gfh_infos = {
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'mt8173': struct.pack("44I",
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0x014d4d4d, 0x00000038, 0x454c4946, 0x464e495f,
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0x0000004f, 0x00000001, 0x01050001, 0x000C0f50,
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0xffffffff, 0x00020000, 0x000000a8, 0x00000020,
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0x000000B0, 0x00000001, 0x014d4d4d, 0x0001000c,
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0x00000001, 0x034d4d4d, 0x00070064, 0x00001182,
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0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00006400, 0x00001388,
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0x00000000, 0x00000000, 0x00000000, 0x00000000,
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)}
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def gen_gfh_info(chip, data):
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entries = {
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'mt8173': 0x000C1000,
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'mt8183': 0x00201000
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}
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gfh_format = '<44I'
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gfh_size = struct.calcsize(gfh_format)
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load_addr = entries[chip] - gfh_size
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load_size = gfh_size + len(data) + hashlib.sha256().digest_size
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gfh = struct.pack(gfh_format,
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0x014d4d4d, 0x00000038, 0x454c4946, 0x464e495f,
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0x0000004f, 0x00000001, 0x01050001, load_addr,
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load_size, 0x00020000, 0x000000a8, 0x00000020,
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0x000000B0, 0x00000001, 0x014d4d4d, 0x0001000c,
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0x00000001, 0x034d4d4d, 0x00070064, 0x00001182,
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0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00006400, 0x00001388,
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0x00000000, 0x00000000, 0x00000000, 0x00000000)
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return gfh
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def gen_emmc_header(data):
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header = (padding(struct.pack("<12sII", "EMMC_BOOT", 1, 512), 512, '\xff') +
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padding(struct.pack("<8sIIIIIIII", "BRLYT", 1, 2048, 2048 + len(data),
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0x42424242, 0x00010005, 2048, 2048 + len(data), 1) + '\0' * 140, 512, '\xff') +
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header = (padding(struct.pack('<12sII', 'EMMC_BOOT', 1, 512), 512, '\xff') +
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padding(struct.pack('<8sIIIIIIII', 'BRLYT', 1, 2048, 2048 + len(data),
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0x42424242, 0x00010005, 2048, 2048 + len(data), 1) + '\0' * 140, 512,
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'\xff') +
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'\0' * 1024)
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return header
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def gen_sf_header(data):
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header = (padding(struct.pack("<12sII", "SF_BOOT", 1, 512), 512, '\xff') +
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padding(struct.pack("<8sIIIIIIII", "BRLYT", 1, 2048, 2048 + len(data),
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0x42424242, 0x00010007, 2048, 2048 + len(data), 1) + '\0' * 140, 512, '\xff') +
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header = (padding(struct.pack('<12sII', 'SF_BOOT', 1, 512), 512, '\xff') +
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padding(struct.pack('<8sIIIIIIII', 'BRLYT', 1, 2048, 2048 + len(data),
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0x42424242, 0x00010007, 2048, 2048 + len(data), 1) + '\0' * 140, 512,
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'\xff') +
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'\0' * 1024)
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return header
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gen_dev_header = {
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"emmc": gen_emmc_header,
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"sf": gen_sf_header
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'emmc': gen_emmc_header,
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'sf': gen_sf_header
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}
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def gen_preloader(chip_ver, flash_type, data):
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gfh_info = gfh_infos[chip_ver]
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gfh_info = gfh_info[0:32] + struct.pack("1I", len(data)+len(gfh_info)+32) + gfh_info[36:len(gfh_info)]
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gfh_info = gen_gfh_info(chip_ver, data)
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gfh_hash = hashlib.sha256(gfh_info + data).digest()
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data = align(gfh_info + data + gfh_hash, 512, '\xff')
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def main(argv):
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if len(argv) != 5:
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print "Usage: %s <chip> <flash_type> <input_file> <output_file>" % argv[0]
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print "\t flash_type: emmc/sf"
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print "\t chip : mt8173"
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print 'Usage: %s <chip> <flash_type> <input_file> <output_file>' % argv[0]
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print '\t flash_type: emmc|sf'
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print '\t chip : mt8173|mt8183'
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exit(1)
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write(argv[4], gen_preloader(argv[1], argv[2], read(argv[3])))
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if __name__ == "__main__":
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if __name__ == '__main__':
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main(sys.argv)
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