From 3debb1fe87383f34552a6796ed6cb4d54470ba52 Mon Sep 17 00:00:00 2001
From: "peichao.wang" <peichao.wang@bitland.corp-partner.google.com>
Date: Wed, 26 Sep 2018 17:38:16 +0800
Subject: [PATCH] =?UTF-8?q?mb/google/octopus:=20Touchpad=20I2C=20CLK=20(40?=
 =?UTF-8?q?5.25KHz)over=20spec(=EF=BC=9C400KHz)?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Need to tune I2C bus 6 clock frequency under the 400KHz

Bug=b:116543001
TEST=flash coreboot to the DUT and measure I2C bus 6 clock
frequency whether arrive to 399.1KHz

Change-Id: I95b535a6b429fc34961a4953004a1c51e53a9be6
Signed-off-by: Peichao.Wang <peichao.wang@bitland.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/28747
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 .../octopus/variants/phaser/overridetree.cb   | 41 +++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/src/mainboard/google/octopus/variants/phaser/overridetree.cb b/src/mainboard/google/octopus/variants/phaser/overridetree.cb
index f2824d8874..2f6915e62a 100644
--- a/src/mainboard/google/octopus/variants/phaser/overridetree.cb
+++ b/src/mainboard/google/octopus/variants/phaser/overridetree.cb
@@ -1,5 +1,46 @@
 chip soc/intel/apollolake
 
+	# Intel Common SoC Config
+	#+-------------------+---------------------------+
+	#| Field             |  Value                    |
+	#+-------------------+---------------------------+
+	#| GSPI0             | cr50 TPM. Early init is   |
+	#|                   | required to set up a BAR  |
+	#|                   | for TPM communication     |
+	#|                   | before memory is up       |
+	#| I2C0              | Digitizer                 |
+	#| I2C5              | Audio                     |
+	#| I2C6              | Trackpad                  |
+	#| I2C7              | Touchscreen               |
+	#+-------------------+---------------------------+
+	register "common_soc_config" = "{
+		.gspi[0] = {
+			.speed_mhz = 1,
+			.early_init = 1,
+		},
+		.i2c[0] = {
+			.speed = I2C_SPEED_FAST,
+			.rise_time_ns = 152,
+			.fall_time_ns = 30,
+		},
+		.i2c[5] = {
+			.speed = I2C_SPEED_FAST,
+			.rise_time_ns = 104,
+			.fall_time_ns = 52,
+		},
+		.i2c[6] = {
+			.speed = I2C_SPEED_FAST,
+			.rise_time_ns = 66,
+			.fall_time_ns = 90,
+			.data_hold_time_ns = 350,
+		},
+		.i2c[7] = {
+			.speed = I2C_SPEED_FAST,
+			.rise_time_ns = 76,
+			.fall_time_ns = 164,
+		},
+	}"
+
 	device domain 0 on
 		device pci 16.0 on
 			chip drivers/i2c/hid