mb/google/rex: Configure ISH GPIO's based on FW_CONFIG

Configures ISH related GPIO's based on FW_CONFIG obtained from CBI.

BUG=b:280329972,b:283023296
TEST= Set bit 21 of FW_CONFIG with CBI
      Boot rex board
      Check that ISH is enabled, loaded, and functional

Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Change-Id: I3f0f9a7c8318fa9ae59b6f613eafdacbfa07c749
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75525
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Bernardo Perez Priego 2023-05-30 13:48:59 -07:00 committed by Felix Held
parent 40cb3fe94d
commit 3dedfcbbd4

View file

@ -72,6 +72,23 @@ static const struct pad_config bt_i2s_disable_pads[] = {
PAD_NC(GPP_VGPIO37, NONE),
};
static const struct pad_config ish_enable_pads[] = {
/* GPP_B02 : ISH I2C0_SDA */
PAD_CFG_NF(GPP_B02, NONE, DEEP, NF3),
/* GPP_B03 : ISH_I2C0_SCL */
PAD_CFG_NF(GPP_B03, NONE, DEEP, NF3),
/* GPP_D05 : ISH_UART_TX */
PAD_CFG_NF(GPP_D05, NONE, DEEP, NF2),
/* GPP_D06 : ISH_UART_RX */
PAD_CFG_NF(GPP_D06, NONE, DEEP, NF2),
/* GPP_B08 : ISH_GP3, SOC_ISH_ACCEL_INT_L */
PAD_CFG_NF(GPP_B08, NONE, DEEP, NF4),
/* GPP_E15 : ISH_GP5A, SOC_ISH_IMU_INT_L */
PAD_CFG_NF(GPP_E15, NONE, DEEP, NF8),
/* GPP_F22 : ISH_GP8A, SOC_ISH_ALS_INT_L */
PAD_CFG_NF(GPP_F22, NONE, DEEP, NF8),
};
void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
{
if (!fw_config_is_provisioned()) {
@ -98,4 +115,9 @@ void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
printk(BIOS_INFO, "Configure GPIOs for BT offload mode.\n");
GPIO_PADBASED_OVERRIDE(padbased_table, bt_i2s_enable_pads);
}
if (fw_config_probe(FW_CONFIG(ISH, ISH_ENABLE))) {
printk(BIOS_INFO, "Configure GPIOs for ISH.\n");
GPIO_PADBASED_OVERRIDE(padbased_table, ish_enable_pads);
}
}