soc/intel/skylake/cpu.c: Fix comment coding style

This comment does not follow any of the styles outlined in the coding
style page of the documentation. Adjust it to match the preferred style.

Change-Id: Idf6d0ea69a08e378266b4256c476580889adfca8
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46428
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/intel/skylake/cpu.c

@@ -34,10 +34,10 @@ static void configure_isst(void)
 
 	if (conf->speed_shift_enable) {
 		/*
-		* Kernel driver checks CPUID.06h:EAX[Bit 7] to determine if HWP
-		  is supported or not. coreboot needs to configure MSR 0x1AA
-		  which is then reflected in the CPUID register.
-		*/
+		 * Kernel driver checks CPUID.06h:EAX[Bit 7] to determine if HWP
+		 * is supported or not. coreboot needs to configure MSR 0x1AA
+		 * which is then reflected in the CPUID register.
+		 */
 		msr = rdmsr(MSR_MISC_PWR_MGMT);
 		msr.lo |= MISC_PWR_MGMT_ISST_EN; /* Enable Speed Shift */
 		msr.lo |= MISC_PWR_MGMT_ISST_EN_INT; /* Enable Interrupt */