Revert "soc/intel/jasperlake: Enable early caching of RAMTOP region"

This reverts commit 21e61847c4.

Reverting as it breaks booting on google/dedede based boards. First boot
after flashing is successful, 2nd hangs with the following error:
[EMERG]  FspMemoryInit returned with error 0x80000003!

TEST=build/boot google/dedede (magpie, metaknight)

Change-Id: I6a2474617b444414c4248dbeda23ed0915704a17
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78091
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm>
This commit is contained in:
Matt DeVillier 2023-09-21 13:56:44 -05:00 committed by Felix Held
parent 8e2e33a044
commit 3e4f586ec0
1 changed files with 1 additions and 2 deletions

View File

@ -66,8 +66,7 @@ config SOC_INTEL_JASPERLAKE
select USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM
select USE_FSP_NOTIFY_PHASE_READY_TO_BOOT
select USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE
select SOC_INTEL_COMMON_BASECODE
select SOC_INTEL_COMMON_BASECODE_RAMTOP
select SOC_INTEL_COMMON_BASECODE if SOC_INTEL_CSE_LITE_SKU
help
Intel Jasperlake support