soc/intel: Drop pmc_soc_restore_power_failure()
Get rid of this function and its dangerous, weak implementation. Instead, call pmc_set_power_failure_state() directly from the SMI handler. Change-Id: I0718afc5db66447c93289643f9097a4257b10934 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34727 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -105,11 +105,6 @@ void pmc_soc_set_afterg3_en(const bool on)
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write32(gen_pmcon1, reg32);
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}
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void pmc_soc_restore_power_failure(void)
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{
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pmc_set_power_failure_state(false);
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}
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void pmc_soc_init(struct device *dev)
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{
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const struct soc_intel_apollolake_config *cfg = config_of(dev);
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@ -45,11 +45,6 @@ void pmc_soc_set_afterg3_en(const bool on)
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write8(pmcbase + GEN_PMCON_A, reg8);
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}
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void pmc_soc_restore_power_failure(void)
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{
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pmc_set_power_failure_state(false);
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}
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static void pm1_enable_pwrbtn_smi(void *unused)
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{
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/*
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@ -126,12 +126,6 @@ void pmc_clear_all_gpe_status(void);
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/* Clear status bits in Power and Reset Status (PRSTS) register */
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void pmc_clear_prsts(void);
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/*
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* Set PMC register to know which state system should be after
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* power reapplied
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*/
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void pmc_soc_restore_power_failure(void);
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/*
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* Enable or disable global reset. If global reset is enabled, hard reset and
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* soft reset will trigger global reset, where both host and TXE are reset.
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@ -79,18 +79,6 @@ __weak uint32_t soc_get_smi_status(uint32_t generic_sts)
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return generic_sts;
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}
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/*
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* Set PMC register to know which state system should be after
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* power reapplied
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*/
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__weak void pmc_soc_restore_power_failure(void)
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{
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/*
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* SoC code should set PMC config register in order to set
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* MAINBOARD_POWER_ON bit as per EDS.
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*/
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}
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int acpi_get_sleep_type(void)
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{
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struct chipset_power_state *ps;
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@ -29,6 +29,7 @@
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#include <intelblocks/uart.h>
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#include <smmstore.h>
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#include <soc/nvs.h>
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#include <soc/pci_devs.h>
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#include <soc/pm.h>
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#include <soc/gpio.h>
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#include <soc/iomap.h>
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@ -221,7 +222,7 @@ void smihandler_southbridge_sleep(
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/* Disable all GPE */
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pmc_disable_all_gpe();
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/* Set which state system will be after power reapplied */
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pmc_soc_restore_power_failure();
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pmc_set_power_failure_state(false);
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/* also iterates over all bridges on bus 0 */
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busmaster_disable_on_bus(0);
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@ -42,11 +42,6 @@ void pmc_soc_set_afterg3_en(const bool on)
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write8(pmcbase + GEN_PMCON_A, reg8);
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}
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void pmc_soc_restore_power_failure(void)
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{
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pmc_set_power_failure_state(false);
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}
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static void config_deep_sX(uint32_t offset, uint32_t mask, int sx, int enable)
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{
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uint32_t reg;
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@ -68,11 +68,6 @@ void pmc_soc_set_afterg3_en(const bool on)
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pci_write_config8(dev, GEN_PMCON_B, reg8);
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}
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void pmc_soc_restore_power_failure(void)
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{
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pmc_set_power_failure_state(false);
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}
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#if ENV_RAMSTAGE
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/* Fill up PMC resource structure */
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int pmc_soc_get_resources(struct pmc_resource_config *cfg)
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