riscv: add include/arch/smp/ directory

Replicate directory layout from x86 for SMP.

Change-Id: I27aee55f24d96ba9e7d8f2e6653f6c9c5e85c66a
Signed-off-by: Xiang Wang <wxjstz@126.com>
Reviewed-on: https://review.coreboot.org/27355
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Xiang Wang 2018-07-08 10:13:52 +08:00 committed by Patrick Georgi
parent 6e3cc8855b
commit 3ec008bf40
4 changed files with 61 additions and 30 deletions

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@ -1,5 +1,6 @@
/*
* Copyright (c) 2013, The Regents of the University of California (Regents).
* Copyright (c) 2018, HardenedLinux.
* All Rights Reserved.
*
* Redistribution and use in source and binary forms, with or without
@ -30,38 +31,58 @@
#include <arch/encoding.h>
typedef struct { volatile int counter; } atomic_t;
#define disable_irqsave() clear_csr(mstatus, MSTATUS_MIE)
#define enable_irqrestore(flags) set_csr(mstatus, (flags) & MSTATUS_MIE)
typedef struct { int lock; } spinlock_t;
#define SPINLOCK_INIT {0}
#define atomic_set(ptr, val) (*(volatile typeof(*(ptr)) *)(ptr) = val)
#define atomic_read(ptr) (*(volatile typeof(*(ptr)) *)(ptr))
#define atomic_set(v, val) ((v)->counter = (val))
#define atomic_read(v) ((v)->counter)
#ifdef __riscv_atomic
# define atomic_add(ptr, inc) __sync_fetch_and_add(ptr, inc)
# define atomic_swap(ptr, swp) __sync_lock_test_and_set(ptr, swp)
# define atomic_cas(ptr, cmp, swp) __sync_val_compare_and_swap(ptr, cmp, swp)
# define atomic_add(v, inc) __sync_fetch_and_add(&((v)->counter), inc)
# define atomic_swap(v, swp) __sync_lock_test_and_set(&((v)->counter), swp)
# define atomic_cas(v, cmp, swp) __sync_val_compare_and_swap(&((v)->counter), \
cmp, swp)
# define atomic_inc(v) atomic_add(v, 1)
# define atomic_dec(v) atomic_add(v, -1)
#else
# define atomic_add(ptr, inc) ({ \
long flags = disable_irqsave(); \
typeof(ptr) res = *(volatile typeof(ptr))(ptr); \
*(volatile typeof(ptr))(ptr) = res + (inc); \
enable_irqrestore(flags); \
res; })
# define atomic_swap(ptr, swp) ({ \
long flags = disable_irqsave(); \
typeof(*ptr) res = *(volatile typeof(ptr))(ptr); \
*(volatile typeof(ptr))(ptr) = (swp); \
enable_irqrestore(flags); \
res; })
# define atomic_cas(ptr, cmp, swp) ({ \
long flags = disable_irqsave(); \
typeof(ptr) res = *(volatile typeof(ptr))(ptr); \
if (res == (cmp)) *(volatile typeof(ptr))(ptr) = (swp); \
enable_irqrestore(flags); \
res; })
#endif
static inline int atomic_add(atomic_t *v, int inc)
{
long flags = disable_irqsave();
int res = v->counter;
v->counter += inc;
enable_irqrestore(flags);
return res;
}
#endif
static inline int atomic_swap(atomic_t *v, int swp)
{
long flags = disable_irqsave();
int res = v->counter;
v->counter = swp;
enable_irqrestore(flags);
return res;
}
static inline int atomic_cas(atomic_t *v, int cmp, int swp)
{
long flags = disable_irqsave();
int res = v->counter;
v->counter = (res == cmp ? swp : res);
enable_irqrestore(flags);
return res;
}
static inline int atomic_inc(atomic_t *v)
{
return atomic_add(v, 1);
}
static inline int atomic_dec(atomic_t *v)
{
return atomic_add(v, -1);
}
#endif //__riscv_atomic
#endif //_RISCV_ATOMIC_H

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@ -0,0 +1,12 @@
/*
* This file is part of the coreboot project.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/

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@ -26,7 +26,6 @@
#ifndef __ASSEMBLER__
#include <arch/encoding.h>
#include <atomic.h>
#include <stdint.h>
typedef struct {

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@ -27,7 +27,6 @@
#include <arch/barrier.h>
#include <arch/errno.h>
#include <atomic.h>
#include <console/console.h>
#include <mcall.h>
#include <string.h>