mainboard/google/reef: Set PL2 override to 15000mW
This patch sets PL2 override value to 15W in RAPL registers. BUG=chrome-os-partner:60535 TEST=Built, booted on reef and verified PL2 value. Change-Id: I4ff6a5e7b8686d97134846ee80cdac10916d58ef Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/17730 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -53,6 +53,8 @@ chip soc/intel/apollolake
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# current VR solution. Experiments show that SoC TDP max (6W) can
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# be reached when RAPL PL1 is set to 12W.
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register "tdp_pl1_override_mw" = "12000"
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# Set RAPL PL2 to 15W.
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register "tdp_pl2_override_mw" = "15000"
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# Enable Audio Clock and Power gating
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register "hdaudio_clk_gate_enable" = "1"
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