soc/intel/broadwell: Select CPU_INTEL_HASWELL

This allows us to drop many now-redundant Kconfig options.

Tested with BUILD_TIMELESS=1, Purism Librem 13 v1 remains identical.
The default configuration file also remains identical, as expected.

Change-Id: I20b0200550508679bf2533342ce918b221dcf81e
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46953
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Angel Pons 2020-11-23 13:34:56 +01:00
parent e751a101c0
commit 3f0a95ac4c
5 changed files with 2 additions and 30 deletions

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@ -1,7 +1,6 @@
config BOARD_GOOGLE_BASEBOARD_AURON config BOARD_GOOGLE_BASEBOARD_AURON
def_bool n def_bool n
select CPU_INTEL_HASWELL
select SOC_INTEL_BROADWELL select SOC_INTEL_BROADWELL
select BOARD_ROMSIZE_KB_8192 select BOARD_ROMSIZE_KB_8192
select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC

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@ -1,6 +1,5 @@
config BOARD_GOOGLE_BASEBOARD_JECHT config BOARD_GOOGLE_BASEBOARD_JECHT
def_bool n def_bool n
select CPU_INTEL_HASWELL
select SOC_INTEL_BROADWELL select SOC_INTEL_BROADWELL
select BOARD_ROMSIZE_KB_8192 select BOARD_ROMSIZE_KB_8192
select SUPERIO_ITE_IT8772F select SUPERIO_ITE_IT8772F

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@ -2,7 +2,6 @@ if BOARD_INTEL_WTM2
config BOARD_SPECIFIC_OPTIONS config BOARD_SPECIFIC_OPTIONS
def_bool y def_bool y
select CPU_INTEL_HASWELL
select SOC_INTEL_BROADWELL select SOC_INTEL_BROADWELL
select BOARD_ROMSIZE_KB_8192 select BOARD_ROMSIZE_KB_8192
select HAVE_ACPI_TABLES select HAVE_ACPI_TABLES

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@ -1,6 +1,5 @@
config BOARD_PURISM_BASEBOARD_LIBREM_BDW config BOARD_PURISM_BASEBOARD_LIBREM_BDW
def_bool n def_bool n
select CPU_INTEL_HASWELL
select SYSTEM_TYPE_LAPTOP select SYSTEM_TYPE_LAPTOP
select BOARD_ROMSIZE_KB_8192 select BOARD_ROMSIZE_KB_8192
select HAVE_ACPI_RESUME select HAVE_ACPI_RESUME

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@ -12,14 +12,10 @@ config INTEL_LYNXPOINT_LP
config SOC_SPECIFIC_OPTIONS config SOC_SPECIFIC_OPTIONS
def_bool y def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ARCH_ALL_STAGES_X86_32
select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
select BOOT_DEVICE_SUPPORTS_WRITES select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS select CACHE_MRC_SETTINGS
select CPU_INTEL_HASWELL
select MRC_SETTINGS_PROTECT select MRC_SETTINGS_PROTECT
select CPU_INTEL_COMMON
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select SUPPORT_CPU_UCODE_IN_CBFS
select HAVE_SMI_HANDLER select HAVE_SMI_HANDLER
select SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS select SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS
select SOUTHBRIDGE_INTEL_COMMON_RESET select SOUTHBRIDGE_INTEL_COMMON_RESET
@ -28,14 +24,10 @@ config SOC_SPECIFIC_OPTIONS
select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9 select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9
select HAVE_USBDEBUG select HAVE_USBDEBUG
select IOAPIC select IOAPIC
select INTEL_LYNXPOINT_LP
select REG_SCRIPT select REG_SCRIPT
select PARALLEL_MP
select RTC select RTC
select SPI_FLASH select SPI_FLASH
select SSE2
select TSC_SYNC_MFENCE
select UDELAY_TSC
select TSC_MONOTONIC_TIMER
select SOC_INTEL_COMMON select SOC_INTEL_COMMON
select INTEL_DESCRIPTOR_MODE_CAPABLE select INTEL_DESCRIPTOR_MODE_CAPABLE
select HAVE_EM100PRO_SPI_CONSOLE_SUPPORT select HAVE_EM100PRO_SPI_CONSOLE_SUPPORT
@ -43,10 +35,6 @@ config SOC_SPECIFIC_OPTIONS
select HAVE_POWER_STATE_AFTER_FAILURE select HAVE_POWER_STATE_AFTER_FAILURE
select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE
config MAX_CPUS
int
default 8
config PCIEXP_ASPM config PCIEXP_ASPM
bool bool
default y default y
@ -91,18 +79,6 @@ config MMCONF_BASE_ADDRESS
hex hex
default 0xf0000000 default 0xf0000000
config SMM_TSEG_SIZE
hex
default 0x800000
config IED_REGION_SIZE
hex
default 0x400000
config SMM_RESERVED_SIZE
hex
default 0x100000
config VGA_BIOS_ID config VGA_BIOS_ID
string string
default "8086,0406" default "8086,0406"