soc/intel/broadwell: Select CPU_INTEL_HASWELL
This allows us to drop many now-redundant Kconfig options. Tested with BUILD_TIMELESS=1, Purism Librem 13 v1 remains identical. The default configuration file also remains identical, as expected. Change-Id: I20b0200550508679bf2533342ce918b221dcf81e Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46953 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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@ -1,7 +1,6 @@
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config BOARD_GOOGLE_BASEBOARD_AURON
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config BOARD_GOOGLE_BASEBOARD_AURON
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def_bool n
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def_bool n
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select CPU_INTEL_HASWELL
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select SOC_INTEL_BROADWELL
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select SOC_INTEL_BROADWELL
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select BOARD_ROMSIZE_KB_8192
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select BOARD_ROMSIZE_KB_8192
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC
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@ -1,6 +1,5 @@
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config BOARD_GOOGLE_BASEBOARD_JECHT
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config BOARD_GOOGLE_BASEBOARD_JECHT
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def_bool n
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def_bool n
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select CPU_INTEL_HASWELL
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select SOC_INTEL_BROADWELL
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select SOC_INTEL_BROADWELL
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select BOARD_ROMSIZE_KB_8192
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select BOARD_ROMSIZE_KB_8192
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select SUPERIO_ITE_IT8772F
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select SUPERIO_ITE_IT8772F
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@ -2,7 +2,6 @@ if BOARD_INTEL_WTM2
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config BOARD_SPECIFIC_OPTIONS
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config BOARD_SPECIFIC_OPTIONS
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def_bool y
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def_bool y
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select CPU_INTEL_HASWELL
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select SOC_INTEL_BROADWELL
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select SOC_INTEL_BROADWELL
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select BOARD_ROMSIZE_KB_8192
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select BOARD_ROMSIZE_KB_8192
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select HAVE_ACPI_TABLES
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select HAVE_ACPI_TABLES
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@ -1,6 +1,5 @@
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config BOARD_PURISM_BASEBOARD_LIBREM_BDW
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config BOARD_PURISM_BASEBOARD_LIBREM_BDW
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def_bool n
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def_bool n
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select CPU_INTEL_HASWELL
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select SYSTEM_TYPE_LAPTOP
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select SYSTEM_TYPE_LAPTOP
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select BOARD_ROMSIZE_KB_8192
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select BOARD_ROMSIZE_KB_8192
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_RESUME
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@ -12,14 +12,10 @@ config INTEL_LYNXPOINT_LP
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config SOC_SPECIFIC_OPTIONS
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config SOC_SPECIFIC_OPTIONS
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def_bool y
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def_bool y
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select ACPI_INTEL_HARDWARE_SLEEP_VALUES
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select ACPI_INTEL_HARDWARE_SLEEP_VALUES
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select ARCH_ALL_STAGES_X86_32
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select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
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select BOOT_DEVICE_SUPPORTS_WRITES
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select BOOT_DEVICE_SUPPORTS_WRITES
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select CACHE_MRC_SETTINGS
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select CACHE_MRC_SETTINGS
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select CPU_INTEL_HASWELL
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select MRC_SETTINGS_PROTECT
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select MRC_SETTINGS_PROTECT
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select CPU_INTEL_COMMON
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select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
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select SUPPORT_CPU_UCODE_IN_CBFS
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select HAVE_SMI_HANDLER
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select HAVE_SMI_HANDLER
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select SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS
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select SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS
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select SOUTHBRIDGE_INTEL_COMMON_RESET
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select SOUTHBRIDGE_INTEL_COMMON_RESET
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@ -28,14 +24,10 @@ config SOC_SPECIFIC_OPTIONS
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select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9
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select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9
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select HAVE_USBDEBUG
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select HAVE_USBDEBUG
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select IOAPIC
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select IOAPIC
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select INTEL_LYNXPOINT_LP
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select REG_SCRIPT
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select REG_SCRIPT
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select PARALLEL_MP
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select RTC
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select RTC
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select SPI_FLASH
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select SPI_FLASH
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select SSE2
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select TSC_SYNC_MFENCE
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select UDELAY_TSC
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select TSC_MONOTONIC_TIMER
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select SOC_INTEL_COMMON
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select SOC_INTEL_COMMON
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select INTEL_DESCRIPTOR_MODE_CAPABLE
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select INTEL_DESCRIPTOR_MODE_CAPABLE
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select HAVE_EM100PRO_SPI_CONSOLE_SUPPORT
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select HAVE_EM100PRO_SPI_CONSOLE_SUPPORT
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@ -43,10 +35,6 @@ config SOC_SPECIFIC_OPTIONS
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select HAVE_POWER_STATE_AFTER_FAILURE
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select HAVE_POWER_STATE_AFTER_FAILURE
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select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE
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select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE
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config MAX_CPUS
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int
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default 8
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config PCIEXP_ASPM
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config PCIEXP_ASPM
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bool
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bool
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default y
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default y
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@ -91,18 +79,6 @@ config MMCONF_BASE_ADDRESS
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hex
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hex
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default 0xf0000000
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default 0xf0000000
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config SMM_TSEG_SIZE
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hex
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default 0x800000
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config IED_REGION_SIZE
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hex
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default 0x400000
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config SMM_RESERVED_SIZE
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hex
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default 0x100000
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config VGA_BIOS_ID
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config VGA_BIOS_ID
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string
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string
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default "8086,0406"
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default "8086,0406"
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