soc/mediatek: Flush cache before triggering EC reset

There will be no log in cbmem if we trigger ec reset on bootblock
stage. Therefore, call dcache_clean_all() before triggering ec
reset to flush cache to store logs on cbmem.

BUG=b:207743045
TEST=show logs on cbmem

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I1bd900beb4cc84f7121c5fb66907fa73b62517fa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59683
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
Rex-BC Chen 2021-11-26 14:18:20 +08:00 committed by Felix Held
parent 5b94cd9e9d
commit 3f15581faf
1 changed files with 4 additions and 0 deletions

View File

@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <arch/cache.h>
#include <device/mmio.h> #include <device/mmio.h>
#include <console/console.h> #include <console/console.h>
#include <soc/wdt.h> #include <soc/wdt.h>
@ -27,7 +28,10 @@ int mtk_wdt_init(void)
* We trigger secondary reset by triggering WDT hardware to send signal to EC. * We trigger secondary reset by triggering WDT hardware to send signal to EC.
* We do not use do_board_reset() to send signal to EC * We do not use do_board_reset() to send signal to EC
* which is controlled by software driver. * which is controlled by software driver.
* Before triggering secondary reset, clean the data cache so the logs in cbmem
* console (either in SRAM or DRAM) can be flushed.
*/ */
dcache_clean_all();
write32(&mtk_wdt->wdt_mode, MTK_WDT_MODE_EXTEN | MTK_WDT_MODE_KEY); write32(&mtk_wdt->wdt_mode, MTK_WDT_MODE_EXTEN | MTK_WDT_MODE_KEY);
write32(&mtk_wdt->wdt_swrst, MTK_WDT_SWRST_KEY); write32(&mtk_wdt->wdt_swrst, MTK_WDT_SWRST_KEY);
} else if (wdt_sta & MTK_WDT_STA_SW_RST) } else if (wdt_sta & MTK_WDT_STA_SW_RST)