mb/google/myst: Enable variants for Myst

BUG=b:270618107
TEST=builds

Signed-off-by: Jon Murphy <jpmurphy@google.com>
Change-Id: I688e9c2fdf203cecfd5f200dec6cde9dbc0a9aa7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74098
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>

src/mainboard/google/myst/Kconfig

@@ -27,6 +27,14 @@ config MAINBOARD_FAMILY
 config MAINBOARD_PART_NUMBER
 	default "Myst" if BOARD_GOOGLE_MYST
 
+config OVERRIDE_DEVICETREE
+	string
+	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
+
+config VARIANT_DIR
+	string
+	default "myst" if BOARD_GOOGLE_MYST
+
 config VBOOT
 	select VBOOT_NO_BOARD_SUPPORT
 	select VBOOT_SEPARATE_VERSTAGE

src/mainboard/google/myst/Makefile.inc

@@ -9,5 +9,7 @@ ramstage-y += port_descriptors.c
 ramstage-$(CONFIG_CHROMEOS) += chromeos.c
 
 subdirs-y += variants/baseboard
+subdirs-y += variants/$(VARIANT_DIR)
 
 CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include
+CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include

src/mainboard/google/myst/mainboard.c

@@ -2,6 +2,7 @@
 
 #include <amdblocks/amd_pci_util.h>
 #include <baseboard/variants.h>
+#include <console/console.h>
 #include <device/device.h>
 
 static const struct fch_irq_routing fch_irq_map[] = {
@@ -33,7 +34,7 @@ static void mainboard_init(void *chip_info)
 
 static void mainboard_enable(struct device *dev)
 {
-	/* TODO(b/270618107): Enable mainboard */
+	printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
 }
 
 struct chip_operations mainboard_ops = {

src/mainboard/google/myst/variants/myst/include/variant/ec.h

@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/ec.h>

src/mainboard/google/myst/variants/myst/overridetree.cb

@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+chip soc/amd/phoenix
+	device domain 0 on end # domain
+end	# chip soc/amd/phoenix