ADLO has long been replaced by SeaBIOS, and it's also in v1 if someone needs

it...
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4900 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2009-10-30 20:38:15 +00:00 committed by Stefan Reinauer
parent 20d626572b
commit 3f3a5f60d3
16 changed files with 0 additions and 12045 deletions

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@ -1,9 +0,0 @@
Most of the analysis, design and implementation of the project was done by
me, Adam Sulmicki. I have received invaluable help from Adam Agnew. Bill
Arbaugh was the person who made it all possible.
I also received help from Christophe Bothamy, Bochs' developer, on all
Boch's bios related issues. Thanks!
I also got tips from Eric W. Biederman, as well as other members of the
coreboot mailing list.

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@ -1,340 +0,0 @@
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@ -1,16 +0,0 @@
DEVELOPER/HACKING/DESIGN
- bochs bios.
we expect most of the bochs patches will be rolled back into
the bochs mainline.
thus when designing an patch for rombios.c both needs of
coreboot as well as bochs needed to be taken into
consideration.
- there are motherboard specific code in loader.s. until this issue
is fixed, you need to adjust various motherboard specific
settings in loader.s In particular control of the
shadow ram.

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1) Are you familar with coreboot?
no : abort
yes: go to next step.
2) do you have Matsonic 7308e motherboard?
no : you are on your own (untested).
yes: go to next step.
3) do you have LiuxBIOS running on Matsonic 7308e motherboard?
no : get it working first on your motherboard.
yes: go to next step.
4) Acquire copy of your VIDEO BIOS.
-Put in your PC BIOS into the system,
-Boot into linux.
-as root run "make videobios" from ADLO's root dir.
-copy the file to video directory
adjust make file as needed.
5) Acquire copy of your PIRQ table.
At present time it is not necessary to do this
and you can use supplied PIRQ table.
6) Acquire copy of BOCHS bios.
At present time it is not necessary to do this
and you can use supplied rombios.c.
In fact you should use supplied rombios.c
file as the one used with BOCHS is not
complete at the present time.
7) Examine make file to see that it does what u want.
8) compile
make
9) use the resulting elf "payload" file with coreboot as you would
have used any other elf file. For example put it on the same
EERPOM as coreboot is, or use EtherBOOT to load the payload
file from hdd or network.

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@ -1,110 +0,0 @@
#-------------------------------------------------
# $Id: Makefile,v 1.2 2003/05/22 12:52:38 aip Exp $
#-------------------------------------------------
ELF064=elf/elf-header-065kb.payload
ELF113=elf/elf-header-113kb.payload
ELF129=elf/elf-header-129kb.payload
LOADER=loader.o
BOCHS_R=bochs
BOCHS_B=bochs/bios
BOCHS_C=bochs/bochs-cvs
BOCHS_X=bochs/bochs-cvs/bochs/bios
BIOS_R=${BOCHS_R}/rombios.bin
BIOS_B=${BOCHS_B}/rombios.bin
BIOS_X=${BOCHS_X}/rombios.bin
PAYLOAD=payload
BOCHSCVS=-d:pserver:anonymous@cvs.bochs.sourceforge.net:/cvsroot/bochs
#-------------------------------------------------
all: clean build #install
#-------------------------------------------------
epia: loader.o bios
cat ${ELF064} ${LOADER} ${BIOS_B} > ${PAYLOAD}
build: loader.o bios
cat ${ELF064} ${LOADER} ${BIOS_B} > ${PAYLOAD}
#-------------------------------------------------
loader.o: loader.s
as86 loader.s -b ${LOADER}
#-------------------------------------------------
bios:
( cd ${BOCHS_B} ; $(MAKE) )
sync
#-------------------------------------------------
#64kb -- sive of Video BIOS
#
#C=`echo 64*1024 | bc`
C=65536
#0xC0000 -- start of Video BIOS in ram.
#S=`echo -e "ibase=16 \n C0000" | bc`
#
# ELF header offset -- 0x1000 == 4096
#
# 786432+4096 = 790528
S=790528
videobios:
dd if=/proc/kcore of=./video.bios.bin bs=1 count=${C} skip=${S}
# 0xF000+0x1000
S2=987136
pcbios:
dd if=/proc/kcore of=./pc.bios.bin bs=1 count=${C} skip=${S2}
pirq: pcbios
#grep -a "\$PIR" -B0 -A127 pc.bios.bin > pirq.bin
grep -a "\$PIR" -B0 -A0 pc.bios.bin > pirq.bin
#now you have to hand edit the pirq.bin file
#-------------------------------------------------
bochslogin:
mkdir -p ${BOCHS_C}
echo "When prompted for a password, simply press the Enter key."
( cd ${BOCHS_C} ; cvs ${BOCHSCVS} login )
bochsco:
mkdir -p ${BOCHS_C}
( cd ${BOCHS_C} ; cvs ${BOCHSCVS} co bochs/bios )
bochsstat:
( cd ${BOCHS_C} ; cvs ${BOCHSCVS} status bochs/bios/rombios.c )
bochsupdate:
( cd ${BOCHS_C} ; cvs ${BOCHSCVS} update bochs/bios/rombios.c )
#-------------------------------------------------
install:
cp -abf ${PAYLOAD} /tftpboot/kernel
sync
#-------------------------------------------------
clean:
rm -rf *.o ${PAYLOAD}
(cd ${BOCHS_B} ; $(MAKE) clean )
distclean: clean
rm -rf ${BOCHS_C}
#-------------------------------------------------

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@ -1,38 +0,0 @@
initial release
boots LILO
"linux_alpha" release
fixed keyboard in lilo
boots linux
(must use "linux mem=100mb ro init=/bin/sh ")
"win2k" release
lilo works
no restrictions
grub works
no restrictions
linux works
no restrictions
openbsd works
no restrictions
win2k
no restrictions
freebsd
hangs at /sbin/init
win98
sometimes boots up to desktop
winXP
finish text mode bar,
switch to gfx mode
stop 7b
"public" release
just bit of cleanups, other than that same as
"win2k" release.

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@ -1,231 +0,0 @@
==========================================
$Id: README,v 1.1 2002/11/25 02:07:53 rminnich Exp $
==========================================
ADLO
A project to combine coreboot and BOCHS BIOS to add support
for booting legacy applications, such as Microsoft Windows.
==========================================
Boot Overvew:
ADLO requires an boot loader with ELF support.
In our case it is either coreboot or EtherBOOT.
Sample execution paths:
coreboot -> ADLO -> LILO -> LINUX
coreboot -> EtherBOOT -> ADLO -> LILO -> LINUX
Then it can start any real mode application.
In our case it could be LILO or GRUB, but
choices are not limited to this.
==========================================
ADLO overview:
-Elf header
-mainteance routines
-bochs bios
-vga bios
------------------------------------------
Elf header
hand crafted binary. Currently there are 3 diff binaries
for three different sizes of payload (65kb,113kb,129kb).
they are catted at beginning of file
------------------------------------------
mainteance routines
this is the loader.s file which gets compiled into loader.o binary
it is catted 2nd right after elf header and it is where
control is being transfered when the elf is executed.
it consist of :
-tuneups:
select device to boot
set memory for Int15/EAX=E820
enable LBA
copy coreboot table [TODO]
-shadow :
enable/write/read
-copy:
bochs @ 0xF00000
video bios (binary only) @ 0xC00000
-switch
from Real to Protected Mode
-jump
jmp to the bios at 0xFFFF:0x0000
we must have bios payload always at 1kb
offset from start of ELF payload so loader.o
must be always 1024 bytes.
------------------------------------------
BOCHS BIOS
we have taken the boch's project and just extracted
its bios from it only. it took us (so far) only
minor modifications in order to make it work.
basically it is the following directory in the
bochs sources
bochs-cvs/bochs/bios
of all files there the rombios.c is the key file.
Most of the times our patches are against current
version of the rombios.c file. We try to feed back
the patches to bochs maintainers so that's possible
to use the bochs bios as is.
the boch's related stuff are in bochs subdirectory.
building boch's bios is as simple as
cd bochs/bochs-cvs/bochs/bios
make
the resulting file rombios.bin is our bios image.
-----
At present time, it is recommended to use
dev86-0.16.3 + my patch in order to compile
bochs' bios. The dev86 package can be found
at:
http://www.cix.co.uk/~mayday/
prepatched sources at:
http://www.missl.cs.umd.edu/~adam/dev86-0.16.3-MSR.tgz
------------------------------------------
Video BIOS
Video BIOS we use is binary only, so far.
At the present time we are using the original
Video BIOS as supplied from the system.
To get the image simply type:
make makevideobios
The right thing will happen. For refernece the
magic line in the Makefile is:
videobios:
dd if=/proc/kcore \
of=./video.bios.bin \
bs=1 count=65536 skip=790528
---------------
We assume it is located at 0xC00000-0xE00000
and we use 'dd and /proc/kcore to extract it
(obviously it works as root only).
Obviously it needs to be done with original
(as shipped by manufactuer bios) so it should
be done as the first step of the ADLO setup.
---------------
The /proc/kcore is in ELF format (linux kernel
2.4.x and later) so if we want to get accurate
image of ram we must skip the ELF header.
The magic command is :
readelf -a /proc/kcore
Program Headers:
Type Offset VirtAddr PhysAddr FileSiz MemSiz
NOTE 0x0007d4 0x00000000 0x00000000 0x005b0 0x00000
LOAD 0x001000 0xc0000000 0x00000000 0xff60000 0xff60000
^^^^^^^^
There we look for the first LOAD section, and see what
is its offset (for us it is 0x1000)
---------------
64KiB = 65536
0x0C 00 00 + 0x10 00 = 790528
---------------
On technical note in our case video bios
is just 48kb, but for paranoia sake we copy
64kb.
==========================================
Environment overview
ADLO is an ELF file and thus can be loaded either directly from 1)
coreboot, or 2) via EtherBOOT, or 3) via EtherBOOT+ AA patch for FS
support.
1)
Both coreboot and ADLO are on the same EEPROM chip. From end-user
viewpoint it is probably the most similar to the bios classic.
(computer boots up and just loads whatever is in MBR).
2)
Set it up in /tftpboot directory on dhcp/tftp server and have it served
from there. (this is how we did the development)
3)
Use AA patch and put it as /kernel file and it will be then loaded by
etherboot from local hard disk.
------------------------------------------
Before ADLO starts.
ADLO requires an boot loader with ELF support.
In our case it is:
-coreboot
-coreboot and EtherBOOT
-coreboot and EtherBOOT + AA polled I/O patch (w/ FS support).
As little as coreboot only is required to get ADLO
up and running.
For development purposes it is recommended full set of
coreboot + EtherBOOT and boot via DHCP/TFTP.
------------------------------------------
After ADLO finish.
ADLO will attempt to locate the first hard disk
and read MBR from it and execute.
Then it can start any real mode application.
In our case it could be LILO or GRUB
but choices are not limited to this.
In our case it would cause LILO to load
(fully usable) and from there it was able to
execute simple programs. so far the list
of the program is limited to linux which
runs somewhat. More to come in future.
==========================================

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@ -1,37 +0,0 @@
Date: Sat, 23 Nov 2002 22:20:57 -0500
From: Adam Sulmicki <adam@cfar.umd.edu>
To: LinuxBIOS <linuxbios@clustermatic.org>
Cc: William Arbaugh <waa@cs.umd.edu>, Adam Agnew <agnew@cs.umd.edu>
Subject: [ANNOUNCE] LinuxBIOS boots Windows 2000, GRUB, and OpenBSD.
We're happy to announce that we've been able to successfully boot
Windows 2000 without a legacy BIOS. We accomplished this by developing
software that combined elements from two very successful projects:
LinuxBIOS and BOCHS. The Etherboot project also helped in various ways.
As a result now, we have a completely open source replacement for the
BIOS that can use (without modification) either LILO or GRUB as
bootloaders, and Linux, OpenBSD, and Windows 2000 as operating systems
(NOTE: We're still working on supporting FreeBSD and Windows XP. We
expect that improving ATA support will permit Win98 and WinXP to boot,
and finishing PIRQ support will permit FreeBSD to boot.) Motherboard
support is also limited at this time, but we hope to expand that along
with LinuxBIOS.
More details can be found at:
http://www.missl.cs.umd.edu/Projects/sebos/main.shtml
and
http://www.missl.cs.umd.edu/Projects/sebos/phase2.shtml
Ironically, twenty years ago this month Compaq introduced their Compaq
portable computer with the first BIOS outside of IBM, see
http://www.old-computers.com/museum/computer.asp?st=1&c=547 .
Adam Sulmicki
Adam Agnew
William Arbaugh
This work has been funded by a grant from DARPA under the CHATS program.

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$Id: STATUS,v 1.1 2002/11/25 02:07:53 rminnich Exp $
==========================================
==========================================
STATUS
==========================================
==========================================
LILO
fully supported
==========================================
GRUB
fully supported
notes
int15/eAX=00C0 - not supported
int15/Eax=5300 - not supported
int 13 ; fn 41 -> dev 81
int 13 ; fn 08 -> dev 81
==========================================
LINUX
fully supported
notes
won't reboot
fix fb?
==========================================
openbsd
fully supported
notes
won't reboot
==========================================
Win2k
fully supported
notes
network?
better gfx?
==========================================
freebsd
somewhat supported
notes
won't reboot
right now it hangs somewhere around fsck/net startup
probably due to bad PIRQ table,
it probably switches to polled IO and is dog slow.
==========================================
Win98
somewhat supported
lots of ata issues, but if get past
ata hurdles, desktop will show up
press F8 for safe mode.
the desktop comes up
(can see "safe mode")
int 15 D8 (?) not supporte
int 15 ?? not supported
int 15 fn 24 (set A20 gate) not suported)
==========================================
winXP
no go
safe/normal boot
progress bar finishes, switches to gfx mode
and immediatelly STOP 7B, no sub error.
more timing problems!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
more likely "unexpected previous state" problems.
cold reboot, normal boot and safe mode
missing hal
\system32\hal.dll
missing system
-------------------
no lba - ie none
function 02, error 11 - drv not ready.
==========================================
==========================================
syslinux
netbsd
hurd
dos
other applications
not supported/tested at present time
==========================================
TODO:
timing in ide read code (int13) [WIP]
grub boot
sometimes it work, sometimes it doesn't
openbsd boot /WinXP boot.
(AH=0x02) misreads sometimes.
fix int15 memory functions. (E820, etc)
so that mem size is not hard coded.
(see prep "fixup" section in loader.s)
fix bios to properly handle reboot
setup PIRQ table for P6STMT mbo.
have it extract from coreboot somehow..
find it in ram and copy...
hack gcc to support 16 bit real mode.
port 80 card broken?
hack dev86 to support rdmsr and wrmsr [done]
==========================================
problems:
-binary only video bios required
-binary only bios required
-warm reboot from pc bios is required
chipset timings or something
P6STMT board only.
int 12 not stable, multiple reboot required
debug msg for slowing down required
==========================================

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# Copyright (C) 2001 MandrakeSoft S.A.
#
# MandrakeSoft S.A.
# 43, rue d'Aboukir
# 75002 Paris - France
# http://www.linux-mandrake.com/
# http://www.mandrakesoft.com/
#
# This library is free software; you can redistribute it and/or
# modify it under the terms of the GNU Lesser General Public
# License as published by the Free Software Foundation; either
# version 2 of the License, or (at your option) any later version.
#
# This library is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
# Lesser General Public License for more details.
#
# You should have received a copy of the GNU Lesser General Public
# License along with this library; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
# Makefile for the BIOS component of bochs
.SUFFIXES: .cc
# -------- end configurable options --------------------------
.cc.o:
$(CXX) -c $(CXXFLAGS) $(LOCAL_CXXFLAGS) $(BX_INCDIRS) $< -o $@
bios: rombios.bin
rombios.bin: rombios.c
gcc -E -P $< > _rombios_.c
bcc -o rombios.s -C-c -D__i86__ -0 -S _rombios_.c
sed -e 's/^\.text//' -e 's/^\.data//' rombios.s > _rombios_.s
as86 _rombios_.s -b rombios.bin -u- -w- -g -0 -j -O -l rombios.txt
ls -l rombios.bin
# -----------------------------------------------------------------
clean:
rm -f *.s
rm -f _rombios_.c
rm -f rombios.txt
rm -f rombios.bin
# -----------------------------------------------------------------

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@ -1 +0,0 @@
The bochs bios.

File diff suppressed because it is too large Load Diff

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@ -1,461 +0,0 @@
;*****************************************************
; $Id: loader.s,v 1.1 2002/11/25 02:07:53 rminnich Exp $
;*****************************************************
USE32
; code it is loaded into memory at 0x7C00
;*****************************************************
nop
nop
;*****************************************************
; A) setup GDT, so that we do not depend on program
; that loaded us for GDT.
; Ex: coreboot and EtherBOOT use different GDT's.
;-----------------------------------------------------
; 0)
cli
;-----------------------------------------------------
; I)
lgdt [0x7C00+protected_gdt]
;-----------------------------------------------------
; II) setup CS
jmp 0x08:0x7C00+newpgdt
newpgdt: nop
;-----------------------------------------------------
; III) setup all other segments
mov ax, #0x10
mov ss, ax
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
;-----------------------------------------------------
; IV)
; not now
;sti
;*****************************************************
nop
nop
;*****************************************************
; B) shadow - ON (enable/read/write)
mov eax, #0x80000070
mov dx, #0x0cf8
out dx, eax
mov eax, #0xFFFFFFFF
mov dx, #0x0cfc
out dx, eax
;*****************************************************
nop
nop
;*****************************************************
; C) copy -- boch bios
; counter - 64kb.
mov ecx, #0x10000
; source - 0x8000 ( 0x7C00+0x400 = 0x8000 )
mov ax, #0x10 ; src-segment - 2nd entry in GDT
mov ds, ax
mov eax, #0x8000 ; src-offset - 0x8000
mov esi, eax
; destination - 0xE0000
mov ax, #0x10 ; dst-segment - 2nd entry in GDT
mov es, ax
mov eax, #0xF0000 ; dst-offset - 0xF0000
mov edi, eax
; clear direction flag
cld
; the copy
rep
movsb
;*****************************************************
nop
nop
;*****************************************************
; X) copy -- coreboot table into safe place.
;; TODO.
;; Q1 : what is the size of table.
;; Q2 : where to copy?
;*****************************************************
nop
nop
;*****************************************************
; E) shadow - OFF (write)
mov eax, #0x80000070
mov dx, #0x0cf8
out dx, eax
;mov eax, #0xFFFFFFFF
mov eax, #0x0000FFFF
mov dx, #0x0cfc
out dx, eax
;*****************************************************
nop
nop
;*****************************************************
; F) do a little prep work.
;-----------------------------------------------------
; I) disable cache
; if you disable cache, GRUB's GFX mode will be VERY slow.
; so DO NOT DISABLE
;mov eax, cr0
;or eax, #0x60000000
;wbinvd
;mov cr0, eax
;wbinvd
;-----------------------------------------------------
; II) disable MTRR
; clear the "E" (0x800) and "FE" (0x400) flags in
; IA32_MTRRdefType register (0x2FF)
;-----------------------
;mov ECX,#0x2FF
; select either of the two below
; depending on if your compiler suports
; {RD,WR}MSR or not
;rdmsr
; .byte 0x0F, 0x32
;xor edx, edx
; xor eax, eax
;and eax, #0xFFFFF3FF
; select either of the two below
; depending on if your compiler suports
; {RD,WR}MSR or not
;wrmsr
; .byte 0x0F, 0x30
;-----------------------
;; This is what PC BIOS is setting. -- P6STMT.
; add VIDEO BIOS cacheable!!!!
;-----------------------
; Fixed Range C0--C8
;mov ECX,#0x268
;mov EDX,#0x05050505
;mov EAX,#0x05050505
;wrmsr
;-----------------------
; Fixed Range C8--CF
;mov ECX,#0x269
;mov EDX,#0x0
;mov EAX,#0x05050505
;wrmsr
;-----------------------
;-----------------------------------------------------
; III) tell BOCHS' BIOS we want to boot from hdd.
; 0x00 - floppy
; 0x02 - hdd
; In future there will be 'fd failover'option in bochs.
mov al, #0x3d ;; cmos_reg
out 0x70, al
mov al, #0x02 ;; val (hdd)
out 0x71, al
;-----------------------------------------------------
; IV) tell BOCHS' BIOS length of our mem block @ 1mb.
; This is for Int 15 / EAX=E820
; 119mb = 0x77 00 00 00
; (this is for 128mb of ram)
; (FIXME: this value is currently hard coded)
; (it should be being passed from coreboot )
; for WinFast 6300
; 07 70 = 0770
; 06 80 = 0770 - 00F0 << ALT (for unpatched bochs)
; for P6STMT - 10kb less ram
; 077F - 10 = 07 6F
; 07 6F - 00 F0 = 06 7F
mov al, #0x35 ;; cmos_reg
out 0x70, al
mov al, #0x06 ;; val
out 0x71, al
mov al, #0x34 ;; cmos_reg
out 0x70, al
mov al, #0x7F ;; val
out 0x71, al
mov al, #0x31 ;; cmos_reg
out 0x70, al
mov al, #0x00 ;; val
out 0x71, al
mov al, #0x30 ;; cmos_reg
out 0x70, al
mov al, #0x00 ;; val
out 0x71, al
;-----------------------------------------------------
; V) tell BOCHS' BIOS we want to have LBA translation.
; 0x00 - NONE
; 0x01 - LBA <<<<
; 0x02 - LARGE
; 0x03 - R-CHS
; In future there will be 'fd failover'option in bochs.
mov al, #0x39 ;; cmos_reg
out 0x70, al
mov al, #0x01 ;; val (LBA)
out 0x71, al
;*****************************************************
nop
nop
;*****************************************************
; G) the switch -- protected to real mode
; IASDM, Vol 3
; (8-14) 8.8.2 Switching Back to Real-Address Mode
;=====================================================
; 1) disable interrupts
cli
;=====================================================
nop
;=====================================================
; 2) paging
;not enabled, so not applicable.
;=====================================================
; 3) setup CS segment limit (64kb)
; I)
lgdt [0x7C00+new_gdt]
;-----------------------------------------------------
; II)
jmp 0x08:0x7C00+new64lim
new64lim: nop
;=====================================================
nop
;=====================================================
; 4) setup all other segments
mov ax, #0x10
mov ss, ax
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
;=====================================================
nop
;=====================================================
; 5) LIDT
; I)
; set up Real Mode IDT table (0...3FF)
; for BOCH's BIOS the address 0xF000:0xFF53
; cantains value 0xCF which is IRET opcode.
; counter
mov cx, #0xFF ;1024 bytes(255 interrupts)(4*255=0x3FF)
; destination - 0x00000 = ES:EDI
mov ax, #0x10 ; dst-segment - 2nd entry in GDT
mov es, ax
mov eax, #0x00000 ; dst-offset - 0x00000
mov edi, eax
; data to store -- 0xF000:FF53
mov eax, #0xF000FF53
; clear direction flag
cld
; the store
rep
stosd
;-----------------------------------------------------
; II)
; load interrupt descriptor table
lidt [0x7C00+new_idt]
;=====================================================
nop
nop
;=====================================================
; 6) clear the PE flag in CR0 register.
; I)
; switch to 16 bit segments
mov ax, #0x20
mov ss, ax
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
;-----------------------------------------------------
; II)
; switch to 16 bit CS
jmp 0x018:0x7C00+new16bit
USE16
new16bit: nop
;-----------------------------------------------------
; III)
; the switch
;xor eax, eax
mov eax, cr0
and eax, #0xFFFFFFFE
mov cr0, eax ;switch to RM
;=====================================================
nop
nop
;=====================================================
; 7) far jump -- (to real mode address)
jmp 0x0:0x7C00+realcs
realcs: nop
;=====================================================
; 8) set all segment registers to 0's
mov ax, #0x0
mov ss, ax
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
;=====================================================
; 9) re-enable interrupts
sti
;*****************************************************
nop
nop
;*****************************************************
; G) jump to BIOS.
jmp 0xFFFF:0x0000
;jmp 0xF000:0xFFF0
;*****************************************************
;*****************************************************
nop
nop
nop
nop
;*****************************************************
;*****************************************************
USE32
new_idt:
dw 0x03ff ;; limit 15:00
dw 0x0000 ;; base 15:00
dw 0x0000 ;; base 23:16
new_gdt:
dw 0x0028 ;; limit 15:00
dw 0x7C00+new_gdt_table ;; base 15:00
dw 0x0000 ;; base 23:16
protected_gdt:
dw 0x0018 ;; limit 15:00
dw 0x7C00+pmode_gdt_table ;; base 15:00
dw 0x0000 ;; base 23:16
;-----------------------------------------------------
new_gdt_table:
;// 1 2 3 4
;//0
dd 0x00000000
dd 0x00000000
;//8
dd 0x0000ffff
dd 0x00409E00
;//10
dd 0x0000ffff
dd 0x00409200
;//18
dd 0x0000ffff
dd 0x00009a00
;//20
dd 0x0000ffff
dd 0x00009200
;-------------------------
pmode_gdt_table:
;// 1 2 3 4
;//0
dd 0x00000000
dd 0x00000000
;//8
dd 0x0000ffff
dd 0x00CF9E00
;//10
dd 0x0000ffff
dd 0x00CF9200
;*****************************************************
;*****************************************************
; the file size must be 1024 bytes.
.org 0x400-1
; dd 0xdeadbeef
db 0x0
;*****************************************************