mb/google/hatch: Add the USB port configuration

This patch adds the configurations for,
* USB 2.0 ports.
* USB 3.0 ports.
* Enables USB xHCI controller.
* GPIO config for USB2_OC2 and USB2_OC3.
* Add the ACPI objects to configure USB ports.

BUG=b:120914069
BRANCH=none
TEST=USE="-intel_mrc -bmpblk" emerge-hatch coreboot.

Change-Id: Ia7b25c25b8208c678aeae3a32033611b69b54062
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Reviewed-on: https://review.coreboot.org/c/30457
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
V Sowmya 2018-12-27 14:53:14 +05:30 committed by Subrata Banik
parent 5c1f178075
commit 3f3d6b3e27
2 changed files with 97 additions and 1 deletions

View File

@ -45,6 +45,23 @@ chip soc/intel/cannonlake
register "SataPortsDevSlp[1]" = "1" register "SataPortsDevSlp[1]" = "1"
register "satapwroptimize" = "1" register "satapwroptimize" = "1"
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port 0
register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port 1
register "usb2_ports[2]" = "USB2_PORT_SHORT(OC3)" # Type-A Port 0
register "usb2_ports[3]" = "USB2_PORT_LONG(OC3)" # Type-A Port 1
register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # BT
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # WWAN
register "usb2_ports[6]" = "USB2_PORT_LONG(OC_SKIP)" # Camera
register "usb2_ports[7]" = "USB2_PORT_EMPTY"
register "usb2_ports[8]" = "USB2_PORT_EMPTY"
register "usb2_ports[9]" = "USB2_PORT_EMPTY"
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)" # Type-C Port 0
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC2)" # Type-C Port 1
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC3)" # Type-A Port 0
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)" # Type-A Port 1
register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC_SKIP)" # WWAN
register "usb3_ports[5]" = "USB3_PORT_EMPTY"
device domain 0 on device domain 0 on
device pci 00.0 on end # Host Bridge device pci 00.0 on end # Host Bridge
@ -53,7 +70,82 @@ chip soc/intel/cannonlake
device pci 12.0 off end # Thermal Subsystem device pci 12.0 off end # Thermal Subsystem
device pci 12.5 off end # UFS SCS device pci 12.5 off end # UFS SCS
device pci 12.6 off end # GSPI #2 device pci 12.6 off end # GSPI #2
device pci 14.0 off end # USB xHCI device pci 14.0 on
chip drivers/usb/acpi
register "desc" = ""Root Hub""
register "type" = "UPC_TYPE_HUB"
device usb 0.0 on
chip drivers/usb/acpi
register "desc" = ""Left Type-C Port""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(1, 1)"
device usb 2.0 on end
end
chip drivers/usb/acpi
register "desc" = ""Right Type-C Port 1""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(2, 1)"
device usb 2.1 on end
end
chip drivers/usb/acpi
register "desc" = ""Left Type-A Port""
register "type" = "UPC_TYPE_A"
register "group" = "ACPI_PLD_GROUP(1, 2)"
device usb 2.2 on end
end
chip drivers/usb/acpi
register "desc" = ""Right Type-A Port 1""
register "type" = "UPC_TYPE_A"
register "group" = "ACPI_PLD_GROUP(2, 2)"
device usb 2.3 on end
end
chip drivers/usb/acpi
register "desc" = ""Bluetooth""
register "type" = "UPC_TYPE_INTERNAL"
device usb 2.4 on end
end
chip drivers/usb/acpi
register "desc" = ""WWAN""
register "type" = "UPC_TYPE_INTERNAL"
device usb 2.5 on end
end
chip drivers/usb/acpi
register "desc" = ""Camera""
register "type" = "UPC_TYPE_INTERNAL"
device usb 2.6 on end
end
chip drivers/usb/acpi
register "desc" = ""Left Type-C Port""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(1, 1)"
device usb 3.0 on end
end
chip drivers/usb/acpi
register "desc" = ""Right Type-C Port 1""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(2, 1)"
device usb 3.1 on end
end
chip drivers/usb/acpi
register "desc" = ""Left Type-A Port""
register "type" = "UPC_TYPE_USB3_A"
register "group" = "ACPI_PLD_GROUP(1, 2)"
device usb 3.2 on end
end
chip drivers/usb/acpi
register "desc" = ""Right Type-A Port 1""
register "type" = "UPC_TYPE_USB3_A"
register "group" = "ACPI_PLD_GROUP(2, 2)"
device usb 3.3 on end
end
chip drivers/usb/acpi
register "desc" = ""WWAN""
register "type" = "UPC_TYPE_INTERNAL"
device usb 3.4 on end
end
end
end
end # USB xHCI
device pci 14.1 off end # USB xDCI (OTG) device pci 14.1 off end # USB xDCI (OTG)
device pci 14.5 off end # SDCard device pci 14.5 off end # SDCard
device pci 15.0 on device pci 15.0 on

View File

@ -49,6 +49,10 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI(GPP_E4, NONE, DEEP), PAD_CFG_GPI(GPP_E4, NONE, DEEP),
/* SATA_DEVSLP1 */ /* SATA_DEVSLP1 */
PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1), PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1),
/* USB_C_OC_OD USB_OC2*/
PAD_CFG_NF(GPP_E11, NONE, DEEP, NF1),
/* USB_A_OC_OD USB_OC3*/
PAD_CFG_NF(GPP_E12, NONE, DEEP, NF1),
/* PCH_MEM_STRAP0 */ /* PCH_MEM_STRAP0 */
PAD_CFG_GPI(GPP_F20, NONE, PLTRST), PAD_CFG_GPI(GPP_F20, NONE, PLTRST),
/* PCH_MEM_STRAP1 */ /* PCH_MEM_STRAP1 */