mb/google/hatch: Add the USB port configuration
This patch adds the configurations for, * USB 2.0 ports. * USB 3.0 ports. * Enables USB xHCI controller. * GPIO config for USB2_OC2 and USB2_OC3. * Add the ACPI objects to configure USB ports. BUG=b:120914069 BRANCH=none TEST=USE="-intel_mrc -bmpblk" emerge-hatch coreboot. Change-Id: Ia7b25c25b8208c678aeae3a32033611b69b54062 Signed-off-by: V Sowmya <v.sowmya@intel.com> Reviewed-on: https://review.coreboot.org/c/30457 Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -45,6 +45,23 @@ chip soc/intel/cannonlake
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register "SataPortsDevSlp[1]" = "1"
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register "satapwroptimize" = "1"
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register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port 0
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register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port 1
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register "usb2_ports[2]" = "USB2_PORT_SHORT(OC3)" # Type-A Port 0
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register "usb2_ports[3]" = "USB2_PORT_LONG(OC3)" # Type-A Port 1
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register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # BT
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register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # WWAN
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register "usb2_ports[6]" = "USB2_PORT_LONG(OC_SKIP)" # Camera
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register "usb2_ports[7]" = "USB2_PORT_EMPTY"
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register "usb2_ports[8]" = "USB2_PORT_EMPTY"
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register "usb2_ports[9]" = "USB2_PORT_EMPTY"
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register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)" # Type-C Port 0
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register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC2)" # Type-C Port 1
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register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC3)" # Type-A Port 0
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register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)" # Type-A Port 1
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register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC_SKIP)" # WWAN
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register "usb3_ports[5]" = "USB3_PORT_EMPTY"
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device domain 0 on
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device pci 00.0 on end # Host Bridge
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@ -53,7 +70,82 @@ chip soc/intel/cannonlake
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device pci 12.0 off end # Thermal Subsystem
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device pci 12.5 off end # UFS SCS
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device pci 12.6 off end # GSPI #2
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device pci 14.0 off end # USB xHCI
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device pci 14.0 on
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chip drivers/usb/acpi
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register "desc" = ""Root Hub""
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register "type" = "UPC_TYPE_HUB"
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device usb 0.0 on
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chip drivers/usb/acpi
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register "desc" = ""Left Type-C Port""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(1, 1)"
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device usb 2.0 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Right Type-C Port 1""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(2, 1)"
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device usb 2.1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Left Type-A Port""
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register "type" = "UPC_TYPE_A"
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register "group" = "ACPI_PLD_GROUP(1, 2)"
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device usb 2.2 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Right Type-A Port 1""
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register "type" = "UPC_TYPE_A"
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register "group" = "ACPI_PLD_GROUP(2, 2)"
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device usb 2.3 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Bluetooth""
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register "type" = "UPC_TYPE_INTERNAL"
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device usb 2.4 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""WWAN""
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register "type" = "UPC_TYPE_INTERNAL"
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device usb 2.5 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Camera""
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register "type" = "UPC_TYPE_INTERNAL"
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device usb 2.6 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Left Type-C Port""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(1, 1)"
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device usb 3.0 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Right Type-C Port 1""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(2, 1)"
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device usb 3.1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Left Type-A Port""
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register "type" = "UPC_TYPE_USB3_A"
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register "group" = "ACPI_PLD_GROUP(1, 2)"
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device usb 3.2 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Right Type-A Port 1""
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register "type" = "UPC_TYPE_USB3_A"
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register "group" = "ACPI_PLD_GROUP(2, 2)"
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device usb 3.3 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""WWAN""
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register "type" = "UPC_TYPE_INTERNAL"
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device usb 3.4 on end
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end
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end
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end
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end # USB xHCI
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device pci 14.1 off end # USB xDCI (OTG)
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device pci 14.5 off end # SDCard
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device pci 15.0 on
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@ -49,6 +49,10 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_GPI(GPP_E4, NONE, DEEP),
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/* SATA_DEVSLP1 */
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PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1),
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/* USB_C_OC_OD USB_OC2*/
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PAD_CFG_NF(GPP_E11, NONE, DEEP, NF1),
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/* USB_A_OC_OD USB_OC3*/
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PAD_CFG_NF(GPP_E12, NONE, DEEP, NF1),
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/* PCH_MEM_STRAP0 */
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PAD_CFG_GPI(GPP_F20, NONE, PLTRST),
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/* PCH_MEM_STRAP1 */
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