mb/google/skyrim: Fix eSPI configuration
* Use GPE 24 since it doesn't conflict with any existing GEVENTS. * Remove IRQ 12 mapping since it's not used. * Unmask IRQ1 in PM registers. * Use the new SMITYPE_ESPI_SCI_B SCI. BUG=b:227282870 TEST=Build and boot to OS in Skyrim. Signed-off-by: Jon Murphy <jpmurphy@google.com> Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I7e9816d67500365ed1d2ee39ef184a1f60321ca1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63704 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
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@ -10,8 +10,8 @@
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static const struct sci_source espi_sci_sources[] = {
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{
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.scimap = SMITYPE_ESPI_SYS,
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.gpe = GEVENT_3,
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.scimap = SMITYPE_ESPI_SCI_B,
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.gpe = EC_SCI_GPI,
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.direction = SMI_SCI_LVL_HIGH, /* enum smi_sci_lvl */
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.level = SMI_SCI_EDG, /* enum smi_sci_dir */
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}
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@ -1,5 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <amdblocks/acpimmio.h>
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#include <amdblocks/amd_pci_util.h>
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#include <baseboard/variants.h>
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#include <console/console.h>
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@ -111,6 +112,10 @@ static void mainboard_enable(struct device *dev)
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init_tables();
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/* Initialize the PIRQ data structures for consumption */
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pirq_setup();
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/* TODO: b/184678786 - Move into espi_config */
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/* Unmask eSPI IRQ 1 (Keyboard) */
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pm_write32(PM_ESPI_INTR_CTRL, PM_ESPI_DEV_INTR_MASK & ~(BIT(1)));
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}
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struct chip_operations mainboard_ops = {
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@ -35,7 +35,7 @@ chip soc/amd/sabrina
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.oob_ch_en = 0,
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.flash_ch_en = 0,
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.vw_irq_polarity = ESPI_VW_IRQ_LEVEL_HIGH(1) | ESPI_VW_IRQ_LEVEL_HIGH(12),
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.vw_irq_polarity = ESPI_VW_IRQ_LEVEL_HIGH(1),
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}"
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register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL |
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@ -52,7 +52,7 @@
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*/
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/* Set GPI for SCI */
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#define EC_SCI_GPI GEVENT_3 /* eSPI system event -> GPE 3 */
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#define EC_SCI_GPI GEVENT_24 /* eSPI system event -> GPE 24 */
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/* Enable LID switch and provide wake pin for EC */
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#define EC_ENABLE_LID_SWITCH
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