mb/google/kahlee: Remove board_id check for Liara 2T timings

Use 2T memory timings on Liara for all board IDs.

BUG=b:116082728
TEST=Build & boot on Liara

Change-Id: I5814e63db35cf7761f4f20792b0f3cf4120a1b60
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/c/30285
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@google.com>
Reviewed-by: Daniel Kurtz <djkurtz@google.com>
This commit is contained in:
Martin Roth 2018-12-17 13:33:10 -07:00 committed by Patrick Georgi
parent 286c6dfd1b
commit 3f6891108b
1 changed files with 2 additions and 2 deletions

View File

@ -38,7 +38,7 @@ static const PSO_ENTRY DDR4PlatformMemoryConfiguration[] = {
0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00),
PSO_END
};
/* TODO: Remove when no longer needed */
/* Liara-specific 2T memory configuration */
static const PSO_ENTRY DDR4LiaraMemoryConfiguration[] = {
DRAM_TECHNOLOGY(ANY_SOCKET, DDR4_TECHNOLOGY),
NUMBER_OF_DIMMS_SUPPORTED(ANY_SOCKET, ANY_CHANNEL, DIMMS_PER_CHANNEL),
@ -58,7 +58,7 @@ static const PSO_ENTRY DDR4LiaraMemoryConfiguration[] = {
void OemPostParams(AMD_POST_PARAMS *PostParams)
{
if ((IS_ENABLED(CONFIG_BOARD_GOOGLE_LIARA)) && (board_id() <= 5))
if (IS_ENABLED(CONFIG_BOARD_GOOGLE_LIARA))
PostParams->MemConfig.PlatformMemoryConfiguration =
(PSO_ENTRY *)DDR4LiaraMemoryConfiguration;
else