AMD binary PI: add vendorcode support for fan control
Binary PI doesn't provide fan control lib. HwmLateService.c and ImcLib.c are ported from Kabini PI. I have tested on AMD Bettong. The two files work. Change-Id: Ia4d24650d2a5544674e9d44c502e8fd9da0b55d3 Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com> Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com> Reviewed-on: http://review.coreboot.org/10719 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
This commit is contained in:
WANG Siyuan
Zheng Bao
parent
a7ff453090
commit
3f95f1d621
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@ -0,0 +1,189 @@
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/* $NoKeywords:$ */
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/**
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* @file
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*
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* Config FCH Hwm controller
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*
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* Init Hwm Controller features.
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*
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* @xrefitem bom "File Content Label" "Release Content"
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* @e project: AGESA
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* @e sub-project: FCH
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* @e \$Revision: 84150 $ @e \$Date: 2012-12-12 15:46:25 -0600 (Wed, 12 Dec 2012) $
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*
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*/
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/*
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*****************************************************************************
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*
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* Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
* * Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* * Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
* * Neither the name of Advanced Micro Devices, Inc. nor the names of
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|
* its contributors may be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
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||||||
|
*
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||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||||
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||||
|
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||||
|
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||||
|
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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****************************************************************************
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*/
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#include "FchPlatform.h"
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#include "Filecode.h"
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#define FILECODE PROC_FCH_HWM_FAMILY_YANGTZE_YANGTZEHWMLATESERVICE_FILECODE
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/**
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* Table for Function Number
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*
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*
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*
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*
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*/
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STATIC UINT8 FunctionNumber[] =
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{
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Fun_81,
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Fun_83,
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Fun_85,
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Fun_89,
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};
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/**
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* Table for Max Thermal Zone
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*
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*
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*
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*
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*/
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UINT8 MaxZone[] =
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{
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4,
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4,
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4,
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4,
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};
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/**
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* Table for Max Register
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*
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*
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*
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*
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*/
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UINT8 MaxRegister[] =
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{
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MSG_REG9,
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MSG_REGB,
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MSG_REG9,
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MSG_REGA,
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};
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/*-------------------------------------------------------------------------------
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;Procedure: IsZoneFuncEnable
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;
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;Description: This routine will check every zone support function with BitMap from user define
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;
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;
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;Exit: None
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;
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;Modified: None
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;
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;-----------------------------------------------------------------------------
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*/
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STATIC BOOLEAN
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IsZoneFuncEnable (
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IN UINT16 Flag,
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IN UINT8 func,
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IN UINT8 Zone
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)
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{
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return (BOOLEAN) (((Flag >> (func *4)) & 0xF) & ((UINT8 )1 << Zone));
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}
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/*-------------------------------------------------------------------------------
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;Procedure: FchECfancontrolservice
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;
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;Description: This routine service EC fan policy
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;
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;
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;Exit: None
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;
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;Modified: None
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;
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;-----------------------------------------------------------------------------
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*/
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VOID
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FchECfancontrolservice (
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IN VOID *FchDataPtr
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)
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{
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UINT8 ZoneNum;
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UINT8 FunNum;
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UINT8 RegNum;
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UINT8 *CurPoint;
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UINT8 FunIndex;
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BOOLEAN IsSendEcMsg;
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FCH_DATA_BLOCK *LocalCfgPtr;
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AMD_CONFIG_PARAMS *StdHeader;
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LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr;
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StdHeader = LocalCfgPtr->StdHeader;
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if (!IsImcEnabled (StdHeader)) {
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return; //IMC is not enabled
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}
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CurPoint = &LocalCfgPtr->Imc.EcStruct.MsgFun81Zone0MsgReg0 + MaxZone[0] * (MaxRegister[0] - MSG_REG0 + 1);
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for ( FunIndex = 1; FunIndex <= 3; FunIndex++ ) {
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FunNum = FunctionNumber[FunIndex];
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for ( ZoneNum = 0; ZoneNum < MaxZone[FunIndex]; ZoneNum++ ) {
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IsSendEcMsg = IsZoneFuncEnable (LocalCfgPtr->Imc.EcStruct.IMCFUNSupportBitMap, FunIndex, ZoneNum);
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if (IsSendEcMsg) {
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for ( RegNum = MSG_REG0; RegNum <= MaxRegister[FunIndex]; RegNum++ ) {
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WriteECmsg (RegNum, AccessWidth8, CurPoint, StdHeader);
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CurPoint += 1;
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}
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WriteECmsg (MSG_SYS_TO_IMC, AccessWidth8, &FunNum, StdHeader); // function number
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WaitForEcLDN9MailboxCmdAck (StdHeader);
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} else {
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CurPoint += (MaxRegister[FunIndex] - MSG_REG0 + 1);
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}
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}
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}
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CurPoint = &LocalCfgPtr->Imc.EcStruct.MsgFun81Zone0MsgReg0;
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for ( FunIndex = 0; FunIndex <= 0; FunIndex++ ) {
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FunNum = FunctionNumber[FunIndex];
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for ( ZoneNum = 0; ZoneNum < MaxZone[FunIndex]; ZoneNum++ ) {
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IsSendEcMsg = IsZoneFuncEnable (LocalCfgPtr->Imc.EcStruct.IMCFUNSupportBitMap, FunIndex, ZoneNum);
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if (IsSendEcMsg) {
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for ( RegNum = MSG_REG0; RegNum <= MaxRegister[FunIndex]; RegNum++ ) {
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if (RegNum == MSG_REG2) {
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*CurPoint &= 0xFE;
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}
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WriteECmsg (RegNum, AccessWidth8, CurPoint, StdHeader);
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CurPoint += 1;
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}
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WriteECmsg (MSG_SYS_TO_IMC, AccessWidth8, &FunNum, StdHeader); // function number
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WaitForEcLDN9MailboxCmdAck (StdHeader);
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} else {
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CurPoint += (MaxRegister[FunIndex] - MSG_REG0 + 1);
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}
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}
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}
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}
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@ -0,0 +1,314 @@
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/* $NoKeywords:$ */
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/**
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* @file
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*
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* FCH IMC lib
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*
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*
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*
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* @xrefitem bom "File Content Label" "Release Content"
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* @e project: AGESA
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* @e sub-project: FCH
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* @e \$Revision: 87213 $ @e \$Date: 2013-01-30 15:37:54 -0600 (Wed, 30 Jan 2013) $
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*
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*/
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/*
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*****************************************************************************
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*
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* Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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||||||
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* modification, are permitted provided that the following conditions are met:
|
||||||
|
* * Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* * Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
* * Neither the name of Advanced Micro Devices, Inc. nor the names of
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* its contributors may be used to endorse or promote products derived
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||||||
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* from this software without specific prior written permission.
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||||||
|
*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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||||||
|
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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||||||
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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||||||
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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||||||
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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****************************************************************************
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*/
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#include "FchPlatform.h"
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#include "Filecode.h"
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#define FILECODE PROC_FCH_IMC_IMCLIB_FILECODE
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/**
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* WriteECmsg
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*
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*
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*
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* @param[in] Address - Address
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* @param[in] OpFlag - Access width
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* @param[in] *Value - Out Value pointer
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* @param[in] StdHeader
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*
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*/
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VOID
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WriteECmsg (
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IN UINT8 Address,
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IN UINT8 OpFlag,
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IN VOID *Value,
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IN AMD_CONFIG_PARAMS *StdHeader
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)
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{
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UINT8 Index;
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ASSERT (OpFlag < AccessWidth64); /* TODO: Add the assertion to make it not crash for now. */
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OpFlag = (OpFlag & 0x7f) - 1;
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if (OpFlag == 0x02) {
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OpFlag = 0x03;
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}
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for (Index = 0; Index <= OpFlag; Index++) {
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/// EC_LDN9_MAILBOX_BASE_ADDRESS
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LibAmdIoWrite (AccessWidth8, MailBoxPort, &Address, StdHeader);
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Address++;
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/// EC_LDN9_MAILBOX_BASE_ADDRESS
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LibAmdIoWrite (AccessWidth8, MailBoxPort + 1, (UINT8 *)Value + Index, StdHeader);
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}
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}
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/**
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* ReadECmsg
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*
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*
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*
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* @param[in] Address - Address
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* @param[in] OpFlag - Access width
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* @param[out] *Value - Out Value pointer
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* @param[in] StdHeader
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*
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*/
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VOID
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ReadECmsg (
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IN UINT8 Address,
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IN UINT8 OpFlag,
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OUT VOID *Value,
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IN AMD_CONFIG_PARAMS *StdHeader
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|
)
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{
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UINT8 Index;
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|
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ASSERT (OpFlag < AccessWidth64); /* TODO: Add the assertion to make it not crash for now. */
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OpFlag = (OpFlag & 0x7f) - 1;
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|
if (OpFlag == 0x02) {
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OpFlag = 0x03;
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|
}
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|
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for (Index = 0; Index <= OpFlag; Index++) {
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/// EC_LDN9_MAILBOX_BASE_ADDRESS
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LibAmdIoWrite (AccessWidth8, MailBoxPort, &Address, StdHeader);
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Address++;
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/// EC_LDN9_MAILBOX_BASE_ADDRESS
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LibAmdIoRead (AccessWidth8, MailBoxPort + 1, (UINT8 *)Value + Index, StdHeader);
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|
}
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|
}
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|
|
||||||
|
/**
|
||||||
|
* WaitForEcLDN9MailboxCmdAck
|
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|
*
|
||||||
|
*
|
||||||
|
* @param[in] StdHeader
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
VOID
|
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|
WaitForEcLDN9MailboxCmdAck (
|
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|
IN AMD_CONFIG_PARAMS *StdHeader
|
||||||
|
)
|
||||||
|
{
|
||||||
|
UINT8 Msgdata;
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|
UINT16 Delaytime;
|
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|
|
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|
Msgdata = 0;
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||||||
|
|
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|
for (Delaytime = 0; Delaytime < 0xFFFF; Delaytime++) {
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|
ReadECmsg (MSG_REG0, AccessWidth8, &Msgdata, StdHeader);
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||||||
|
if ( Msgdata == 0xfa) {
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|
break;
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||||||
|
}
|
||||||
|
|
||||||
|
FchStall (5, StdHeader); /// Wait for 1ms
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* ImcSleep - IMC Sleep.
|
||||||
|
*
|
||||||
|
*
|
||||||
|
* @param[in] FchDataPtr Fch configuration structure pointer.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
VOID
|
||||||
|
ImcSleep (
|
||||||
|
IN VOID *FchDataPtr
|
||||||
|
)
|
||||||
|
{
|
||||||
|
UINT8 Msgdata;
|
||||||
|
FCH_DATA_BLOCK *LocalCfgPtr;
|
||||||
|
AMD_CONFIG_PARAMS *StdHeader;
|
||||||
|
|
||||||
|
LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr;
|
||||||
|
StdHeader = LocalCfgPtr->StdHeader;
|
||||||
|
|
||||||
|
if (!(IsImcEnabled (StdHeader)) ) {
|
||||||
|
return; ///IMC is not enabled
|
||||||
|
}
|
||||||
|
|
||||||
|
Msgdata = 0x00;
|
||||||
|
WriteECmsg (MSG_REG0, AccessWidth8, &Msgdata, StdHeader);
|
||||||
|
Msgdata = 0xB4;
|
||||||
|
WriteECmsg (MSG_REG1, AccessWidth8, &Msgdata, StdHeader);
|
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|
Msgdata = 0x00;
|
||||||
|
WriteECmsg (MSG_REG2, AccessWidth8, &Msgdata, StdHeader);
|
||||||
|
Msgdata = 0x96;
|
||||||
|
WriteECmsg (MSG_SYS_TO_IMC, AccessWidth8, &Msgdata, StdHeader);
|
||||||
|
WaitForEcLDN9MailboxCmdAck (StdHeader);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* SoftwareDisableImc - Software disable IMC strap
|
||||||
|
*
|
||||||
|
*
|
||||||
|
* @param[in] FchDataPtr Fch configuration structure pointer.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
VOID
|
||||||
|
SoftwareDisableImc (
|
||||||
|
IN VOID *FchDataPtr
|
||||||
|
)
|
||||||
|
{
|
||||||
|
UINT8 ValueByte;
|
||||||
|
UINT8 PortStatusByte;
|
||||||
|
UINT32 AbValue;
|
||||||
|
UINT32 ABStrapOverrideReg;
|
||||||
|
AMD_CONFIG_PARAMS *StdHeader;
|
||||||
|
|
||||||
|
StdHeader = ((FCH_DATA_BLOCK *) FchDataPtr)->StdHeader;
|
||||||
|
GetChipSysMode (&PortStatusByte, StdHeader);
|
||||||
|
|
||||||
|
RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REGC8 + 3, AccessWidth8, 0x7F, BIT7, StdHeader);
|
||||||
|
ReadPmio (0xBF, AccessWidth8, &ValueByte, StdHeader);
|
||||||
|
|
||||||
|
ReadMem ((ACPI_MMIO_BASE + MISC_BASE + FCH_MISC_REG80), AccessWidth32, &AbValue);
|
||||||
|
ABStrapOverrideReg = AbValue;
|
||||||
|
ABStrapOverrideReg &= ~BIT2; // bit2=0 EcEnableStrap
|
||||||
|
WriteMem ((ACPI_MMIO_BASE + MISC_BASE + 0x84), AccessWidth32, &ABStrapOverrideReg);
|
||||||
|
|
||||||
|
ReadPmio (FCH_PMIOA_REGD7, AccessWidth8, &ValueByte, StdHeader);
|
||||||
|
ValueByte |= BIT1;
|
||||||
|
WritePmio (FCH_PMIOA_REGD7, AccessWidth8, &ValueByte, StdHeader);
|
||||||
|
|
||||||
|
ValueByte = 06;
|
||||||
|
LibAmdIoWrite (AccessWidth8, 0xcf9, &ValueByte, StdHeader);
|
||||||
|
FchStall (0xffffffff, StdHeader);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* ImcDisableSurebootTimer - IMC Disable Sureboot Timer.
|
||||||
|
*
|
||||||
|
*
|
||||||
|
* @param[in] FchDataPtr Fch configuration structure pointer.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
VOID
|
||||||
|
ImcDisableSurebootTimer (
|
||||||
|
IN VOID *FchDataPtr
|
||||||
|
)
|
||||||
|
{
|
||||||
|
UINT8 Msgdata;
|
||||||
|
AMD_CONFIG_PARAMS *StdHeader;
|
||||||
|
|
||||||
|
StdHeader = ((FCH_DATA_BLOCK *) FchDataPtr)->StdHeader;
|
||||||
|
|
||||||
|
if (!(IsImcEnabled (StdHeader)) ) {
|
||||||
|
return; ///IMC is not enabled
|
||||||
|
}
|
||||||
|
|
||||||
|
ImcWakeup (FchDataPtr);
|
||||||
|
Msgdata = 0x00;
|
||||||
|
WriteECmsg (MSG_REG0, AccessWidth8, &Msgdata, StdHeader);
|
||||||
|
Msgdata = 0x01;
|
||||||
|
WriteECmsg (MSG_REG1, AccessWidth8, &Msgdata, StdHeader);
|
||||||
|
Msgdata = 0x00;
|
||||||
|
WriteECmsg (MSG_REG2, AccessWidth8, &Msgdata, StdHeader);
|
||||||
|
Msgdata = 0x94;
|
||||||
|
WriteECmsg (MSG_SYS_TO_IMC, AccessWidth8, &Msgdata, StdHeader);
|
||||||
|
WaitForEcLDN9MailboxCmdAck (StdHeader);
|
||||||
|
ImcSleep (FchDataPtr);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* ImcWakeup - IMC Wakeup.
|
||||||
|
*
|
||||||
|
*
|
||||||
|
* @param[in] FchDataPtr Fch configuration structure pointer.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
VOID
|
||||||
|
ImcWakeup (
|
||||||
|
IN VOID *FchDataPtr
|
||||||
|
)
|
||||||
|
{
|
||||||
|
UINT8 Msgdata;
|
||||||
|
AMD_CONFIG_PARAMS *StdHeader;
|
||||||
|
|
||||||
|
StdHeader = ((FCH_DATA_BLOCK *) FchDataPtr)->StdHeader;
|
||||||
|
if (!(IsImcEnabled (StdHeader)) ) {
|
||||||
|
return; ///IMC is not enabled
|
||||||
|
}
|
||||||
|
|
||||||
|
Msgdata = 0x00;
|
||||||
|
WriteECmsg (MSG_REG0, AccessWidth8, &Msgdata, StdHeader);
|
||||||
|
Msgdata = 0xB5;
|
||||||
|
WriteECmsg (MSG_REG1, AccessWidth8, &Msgdata, StdHeader);
|
||||||
|
Msgdata = 0x00;
|
||||||
|
WriteECmsg (MSG_REG2, AccessWidth8, &Msgdata, StdHeader);
|
||||||
|
Msgdata = 0x96;
|
||||||
|
WriteECmsg (MSG_SYS_TO_IMC, AccessWidth8, &Msgdata, StdHeader);
|
||||||
|
WaitForEcLDN9MailboxCmdAck (StdHeader);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* ImcIdle - IMC Idle.
|
||||||
|
*
|
||||||
|
*
|
||||||
|
* @param[in] FchDataPtr Fch configuration structure pointer.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
VOID
|
||||||
|
ImcIdle (
|
||||||
|
IN VOID *FchDataPtr
|
||||||
|
)
|
||||||
|
{
|
||||||
|
UINT8 Msgdata;
|
||||||
|
AMD_CONFIG_PARAMS *StdHeader;
|
||||||
|
|
||||||
|
StdHeader = ((FCH_DATA_BLOCK *) FchDataPtr)->StdHeader;
|
||||||
|
|
||||||
|
if (!(IsImcEnabled (StdHeader)) ) {
|
||||||
|
return; ///IMC is not enabled
|
||||||
|
}
|
||||||
|
|
||||||
|
Msgdata = 0x00;
|
||||||
|
WriteECmsg (MSG_REG0, AccessWidth8, &Msgdata, StdHeader);
|
||||||
|
Msgdata = 0x01;
|
||||||
|
WriteECmsg (MSG_REG1, AccessWidth8, &Msgdata, StdHeader);
|
||||||
|
Msgdata = 0x00;
|
||||||
|
WriteECmsg (MSG_REG2, AccessWidth8, &Msgdata, StdHeader);
|
||||||
|
Msgdata = 0x98;
|
||||||
|
WriteECmsg (MSG_SYS_TO_IMC, AccessWidth8, &Msgdata, StdHeader);
|
||||||
|
WaitForEcLDN9MailboxCmdAck (StdHeader);
|
||||||
|
}
|
||||||
|
|
@ -103,6 +103,9 @@ agesa_raw_files += $(wildcard $(AGESA_ROOT)/Proc/Fch/Kern/KernImc/*.[cS])
|
||||||
agesa_raw_files += $(wildcard $(AGESA_ROOT)/Proc/Fch/Common/*.[cS])
|
agesa_raw_files += $(wildcard $(AGESA_ROOT)/Proc/Fch/Common/*.[cS])
|
||||||
agesa_raw_files += $(wildcard $(AGESA_ROOT)/Proc/Psp/PspBaseLib/*.[cS])
|
agesa_raw_files += $(wildcard $(AGESA_ROOT)/Proc/Psp/PspBaseLib/*.[cS])
|
||||||
endif
|
endif
|
||||||
|
ifeq ($(CONFIG_HUDSON_IMC_FWM),y)
|
||||||
|
agesa_raw_files += $(wildcard $(src)/vendorcode/amd/pi/Lib/imc/*.c)
|
||||||
|
endif
|
||||||
|
|
||||||
classes-$(CONFIG_CPU_AMD_AGESA_BINARY_PI) += libagesa
|
classes-$(CONFIG_CPU_AMD_AGESA_BINARY_PI) += libagesa
|
||||||
$(eval $(call create_class_compiler,libagesa,x86_32))
|
$(eval $(call create_class_compiler,libagesa,x86_32))
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue