ec/google/chromeec: Update ec_commands.h
This change copies ec_commands.h directly from the ChromiumOS EC repo, with the exception of changing the copyright header to SDPX format. Update to commit SHA1 2cbf6fbf (ec_commands: Drop VBNV read/write support). BUG=b:178689388 TEST=none BRANCH=none Change-Id: I74fa8b1171ca109dee163a7657659cdac1687450 Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/65469 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Yu-Ping Wu
Felix Held
parent
0214a36987
commit
3fa36f63ae
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@ -103,10 +103,14 @@ extern "C" {
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/*
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* The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
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* and they tell the kernel that so we have to think of it as two parts.
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*
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* Other BIOSes report only the I/O port region spanned by the Microchip
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* MEC series EC; an attempt to address a larger region may fail.
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*/
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#define EC_HOST_CMD_REGION0 0x800
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#define EC_HOST_CMD_REGION1 0x880
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#define EC_HOST_CMD_REGION_SIZE 0x80
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#define EC_HOST_CMD_MEC_REGION_SIZE 0x8
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/* EC command register bit functions */
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#define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */
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@ -825,8 +829,12 @@ struct ec_lpc_host_args {
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* EC is ready to receive, and has ignored the byte sent by the AP. EC expects
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* that the AP will send a valid packet header (starting with
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* EC_COMMAND_PROTOCOL_3) in the next 32 bytes.
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*
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* NOTE: Some SPI configurations place the Most Significant Bit on SDO when
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* CS goes low. This macro has the Most Significant Bit set to zero,
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* so SDO will not be driven high when CS goes low.
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*/
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#define EC_SPI_RX_READY 0xf8
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#define EC_SPI_RX_READY 0x78
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/*
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* EC has started receiving the request from the AP, but hasn't started
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@ -1507,6 +1515,10 @@ enum ec_feature_code {
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* The EC supports entering and residing in S4.
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*/
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EC_FEATURE_S4_RESIDENCY = 44,
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/*
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* The EC supports the AP directing mux sets for the board.
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*/
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EC_FEATURE_TYPEC_AP_MUX_SET = 45,
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};
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#define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32)
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@ -1854,34 +1866,6 @@ struct ec_response_flash_region_info {
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uint32_t size;
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} __ec_align4;
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/*
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* Read/write VbNvContext
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*
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* Deprecated as of February 2021. No current devices use VBNV in EC
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* BBRAM anymore, so this is guaranteed to fail.
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*
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* TODO(b/178689388): remove from this header once no external
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* dependencies reference these constants.
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*/
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#define EC_CMD_VBNV_CONTEXT 0x0017
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#define EC_VER_VBNV_CONTEXT 1
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#define EC_VBNV_BLOCK_SIZE 16
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enum ec_vbnvcontext_op {
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EC_VBNV_CONTEXT_OP_READ,
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EC_VBNV_CONTEXT_OP_WRITE,
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};
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struct ec_params_vbnvcontext {
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uint32_t op;
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uint8_t block[EC_VBNV_BLOCK_SIZE];
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} __ec_align4;
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struct ec_response_vbnvcontext {
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uint8_t block[EC_VBNV_BLOCK_SIZE];
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} __ec_align4;
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/* Get SPI flash information */
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#define EC_CMD_FLASH_SPI_INFO 0x0018
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@ -4713,6 +4697,39 @@ struct ec_params_dedicated_charger_limit {
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uint16_t voltage_lim; /* in mV */
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} __ec_align2;
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/*
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* Get and set charging splashscreen variables
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*/
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#define EC_CMD_CHARGESPLASH 0x00A5
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enum ec_chargesplash_cmd {
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/* Get the current state variables */
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EC_CHARGESPLASH_GET_STATE = 0,
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/* Indicate initialization of the display loop */
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EC_CHARGESPLASH_DISPLAY_READY,
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/* Manually put the EC into the requested state */
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EC_CHARGESPLASH_REQUEST,
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/* Reset all state variables */
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EC_CHARGESPLASH_RESET,
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/* Manually trigger a lockout */
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EC_CHARGESPLASH_LOCKOUT,
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};
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struct __ec_align1 ec_params_chargesplash {
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/* enum ec_chargesplash_cmd */
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uint8_t cmd;
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};
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struct __ec_align1 ec_response_chargesplash {
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uint8_t requested;
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uint8_t display_initialized;
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uint8_t locked_out;
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};
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/*****************************************************************************/
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/* Hibernate/Deep Sleep Commands */
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@ -5664,6 +5681,15 @@ struct ec_response_charge_port_count {
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uint8_t port_count;
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} __ec_align1;
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/*
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* This command enable/disable dynamic PDO selection.
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*/
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#define EC_CMD_USB_PD_DPS_CONTROL 0x0106
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struct ec_params_usb_pd_dps_control {
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uint8_t enable;
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} __ec_align1;
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/* Write USB-PD device FW */
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#define EC_CMD_USB_PD_FW_UPDATE 0x0110
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@ -6634,6 +6660,7 @@ enum typec_control_command {
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TYPEC_CONTROL_COMMAND_CLEAR_EVENTS,
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TYPEC_CONTROL_COMMAND_ENTER_MODE,
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TYPEC_CONTROL_COMMAND_TBT_UFP_REPLY,
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TYPEC_CONTROL_COMMAND_USB_MUX_SET,
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};
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/* Modes (USB or alternate) that a type-C port may enter. */
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@ -6649,6 +6676,11 @@ enum typec_tbt_ufp_reply {
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TYPEC_TBT_UFP_REPLY_ACK,
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};
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struct typec_usb_mux_set {
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uint8_t mux_index; /* Index of the mux to set in the chain */
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uint8_t mux_flags; /* USB_PD_MUX_*-encoded USB mux state to set */
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} __ec_align1;
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struct ec_params_typec_control {
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uint8_t port;
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uint8_t command; /* enum typec_control_command */
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@ -6666,6 +6698,8 @@ struct ec_params_typec_control {
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uint8_t mode_to_enter;
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/* Used for TBT_UFP_REPLY - enum typec_tbt_ufp_reply */
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uint8_t tbt_ufp_reply;
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/* Used for USB_MUX_SET */
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struct typec_usb_mux_set mux_params;
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uint8_t placeholder[128];
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};
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} __ec_align1;
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@ -6753,6 +6787,8 @@ enum tcpc_cc_polarity {
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#define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1)
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#define PD_STATUS_EVENT_HARD_RESET BIT(2)
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#define PD_STATUS_EVENT_DISCONNECTED BIT(3)
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#define PD_STATUS_EVENT_MUX_0_SET_DONE BIT(4)
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#define PD_STATUS_EVENT_MUX_1_SET_DONE BIT(5)
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/*
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* Encode and decode for BCD revision response
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@ -6913,7 +6949,20 @@ struct ec_response_pchg {
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/* Fields added in version 1 */
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uint32_t fw_version;
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uint32_t dropped_event_count;
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} __ec_align2;
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} __ec_align4;
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struct ec_response_pchg_v2 {
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uint32_t error; /* enum pchg_error */
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uint8_t state; /* enum pchg_state state */
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uint8_t battery_percentage;
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uint8_t unused0;
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uint8_t unused1;
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/* Fields added in version 1 */
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uint32_t fw_version;
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uint32_t dropped_event_count;
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/* Fields added in version 2 */
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uint32_t dropped_host_event_count;
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} __ec_align4;
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enum pchg_state {
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/* Charger is reset and not initialized. */
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@ -6959,7 +7008,7 @@ enum pchg_state {
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#define EC_MKBP_PCHG_PORT_SHIFT 28
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/* Utility macros for converting MKBP event <-> port number. */
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#define EC_MKBP_PCHG_EVENT_TO_PORT(e) (((e) >> EC_MKBP_PCHG_PORT_SHIFT) & 0xf)
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#define EC_MKBP_PCHG_PORT_TO_EVENT(p) (BIT((p) + EC_MKBP_PCHG_PORT_SHIFT))
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#define EC_MKBP_PCHG_PORT_TO_EVENT(p) ((p) << EC_MKBP_PCHG_PORT_SHIFT)
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/* Utility macro for extracting event bits. */
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#define EC_MKBP_PCHG_EVENT_MASK(e) ((e) \
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& GENMASK(EC_MKBP_PCHG_PORT_SHIFT-1, 0))
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@ -7058,6 +7107,66 @@ struct ec_response_i2c_control {
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} cmd_response;
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} __ec_align_size1;
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#define EC_CMD_RGBKBD_SET_COLOR 0x013A
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#define EC_CMD_RGBKBD 0x013B
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#define EC_RGBKBD_MAX_KEY_COUNT 128
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#define EC_RGBKBD_MAX_RGB_COLOR 0xFFFFFF
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#define EC_RGBKBD_MAX_SCALE 0xFF
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enum rgbkbd_state {
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/* RGB keyboard is reset and not initialized. */
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RGBKBD_STATE_RESET = 0,
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/* RGB keyboard is initialized but not enabled. */
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RGBKBD_STATE_INITIALIZED,
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/* RGB keyboard is disabled. */
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RGBKBD_STATE_DISABLED,
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/* RGB keyboard is enabled and ready to receive a command. */
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RGBKBD_STATE_ENABLED,
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/* Put no more entry below */
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RGBKBD_STATE_COUNT,
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};
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enum ec_rgbkbd_subcmd {
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EC_RGBKBD_SUBCMD_CLEAR = 1,
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EC_RGBKBD_SUBCMD_DEMO = 2,
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EC_RGBKBD_SUBCMD_SET_SCALE = 3,
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EC_RGBKBD_SUBCMD_COUNT
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};
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enum ec_rgbkbd_demo {
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EC_RGBKBD_DEMO_OFF = 0,
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EC_RGBKBD_DEMO_FLOW = 1,
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EC_RGBKBD_DEMO_DOT = 2,
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EC_RGBKBD_DEMO_COUNT,
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};
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BUILD_ASSERT(EC_RGBKBD_DEMO_COUNT <= 255);
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struct ec_rgbkbd_set_scale {
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uint8_t key;
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struct rgb_s scale;
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};
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struct ec_params_rgbkbd {
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uint8_t subcmd; /* Sub-command (enum ec_rgbkbd_subcmd) */
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union {
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struct rgb_s color; /* EC_RGBKBD_SUBCMD_CLEAR */
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uint8_t demo; /* EC_RGBKBD_SUBCMD_DEMO */
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struct ec_rgbkbd_set_scale set_scale;
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};
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} __ec_align1;
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struct ec_params_rgbkbd_set_color {
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/* Specifies the starting key ID whose color is being changed. */
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uint8_t start_key;
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/* Specifies # of elements in <color>. */
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uint8_t length;
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/* RGB color data array of length up to MAX_KEY_COUNT. */
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struct rgb_s color[];
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} __ec_align1;
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/*****************************************************************************/
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/* The command range 0x200-0x2FF is reserved for Rotor. */
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@ -7120,22 +7229,28 @@ struct ec_params_fp_passthru {
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/* Capture types defined in bits [30..28] */
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#define FP_MODE_CAPTURE_TYPE_SHIFT 28
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#define FP_MODE_CAPTURE_TYPE_MASK (0x7 << FP_MODE_CAPTURE_TYPE_SHIFT)
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/*
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* This enum must remain ordered, if you add new values you must ensure that
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* FP_CAPTURE_TYPE_MAX is still the last one.
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/**
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* enum fp_capture_type - Specifies the "mode" when capturing images.
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*
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* @FP_CAPTURE_VENDOR_FORMAT: Capture 1-3 images and choose the best quality
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* image (produces 'frame_size' bytes)
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* @FP_CAPTURE_SIMPLE_IMAGE: Simple raw image capture (produces width x height x
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* bpp bits)
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* @FP_CAPTURE_PATTERN0: Self test pattern (e.g. checkerboard)
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* @FP_CAPTURE_PATTERN1: Self test pattern (e.g. inverted checkerboard)
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* @FP_CAPTURE_QUALITY_TEST: Capture for Quality test with fixed contrast
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* @FP_CAPTURE_RESET_TEST: Capture for pixel reset value test
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* @FP_CAPTURE_TYPE_MAX: End of enum
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*
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* @note This enum must remain ordered, if you add new values you must ensure
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* that FP_CAPTURE_TYPE_MAX is still the last one.
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*/
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enum fp_capture_type {
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/* Full blown vendor-defined capture (produces 'frame_size' bytes) */
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FP_CAPTURE_VENDOR_FORMAT = 0,
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/* Simple raw image capture (produces width x height x bpp bits) */
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FP_CAPTURE_SIMPLE_IMAGE = 1,
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/* Self test pattern (e.g. checkerboard) */
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FP_CAPTURE_PATTERN0 = 2,
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/* Self test pattern (e.g. inverted checkerboard) */
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FP_CAPTURE_PATTERN1 = 3,
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/* Capture for Quality test with fixed contrast */
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FP_CAPTURE_QUALITY_TEST = 4,
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/* Capture for pixel reset value test */
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FP_CAPTURE_RESET_TEST = 5,
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FP_CAPTURE_TYPE_MAX,
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};
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