mainboard/asus/kgpe-d16: Properly configure SR5690 southbridge PIKE slot

Change-Id: I2f1373905ffd6460ac3c7c21738e2e2a9aa2e463
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11992
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Timothy Pearson 2015-06-12 20:10:58 -05:00 committed by Patrick Georgi
parent cdc526e582
commit 3fcb11478f
1 changed files with 3 additions and 3 deletions

View File

@ -43,9 +43,9 @@ chip northbridge/amd/amdfam10/root_complex # Root complex
end end
register "gpp1_configuration" = "0" # Configuration 16:0 default register "gpp1_configuration" = "0" # Configuration 16:0 default
register "gpp2_configuration" = "1" # Configuration 8:8 register "gpp2_configuration" = "1" # Configuration 8:8
#register "gpp3a_configuration" = "2" # Configuration 4:1:1:0:0:0 register "gpp3a_configuration" = "2" # Configuration 4:1:1:0:0:0
register "gpp3a_configuration" = "11" # Configuration 1:1:1:1:1:1 register "port_enable" = "0x3f1c" # Enable all ports except 0, 1, 5, 6, and 7
register "port_enable" = "0x3ffc" # Enable all ports except 0 and 1 register "pcie_settling_time" = "1000000" # Allow PIKE to be detected / configured
end end
chip southbridge/amd/sb700 # Secondary southbridge chip southbridge/amd/sb700 # Secondary southbridge
device pci 11.0 on end # SATA device pci 11.0 on end # SATA