mainboard/google/hatch: Enable PEN_EJECT_L as wake & notify source.
Updated GPP_A8 to be a GPI and SCI source, to support both wake and notifications. BUG=b:128941098 BRANCH=none TEST=Compiles, simulated pen eject with PCH_INT_L signal. Both evtest and waking from s0ix confirm this works. The output of /proc/interrupts confirms the correct interrupt is triggered. Change-Id: I080fb3cbfb3e2f55209ca31824b00ca820d70f78 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32487 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -30,8 +30,8 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_GPI_INT(GPP_A6, NONE, PLTRST, LEVEL),
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/* A7 : PP3300_SOC_A */
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PAD_NC(GPP_A7, NONE),
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/* A8 : EMR_GARAGE_DET */
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PAD_CFG_GPI_GPIO_DRIVER(GPP_A8, NONE, DEEP),
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/* A8 : PEN_GARAGE_DET_L */
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PAD_CFG_GPI_GPIO_DRIVER_SCI(GPP_A8, NONE, DEEP, LEVEL, NONE),
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/* A9 : ESPI_CLK */
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/* A10 : FPMCU_PCH_BOOT1 */
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PAD_CFG_GPO(GPP_A10, 0, DEEP),
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@ -86,7 +86,9 @@ chip soc/intel/cannonlake
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end
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chip drivers/generic/gpio_keys
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register "name" = ""PENH""
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register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_HIGH(GPP_A8)"
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register "gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A8)"
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register "key.wake" = "GPE0_DW0_08"
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register "key.wakeup_event_action" = "EV_ACT_ASSERTED"
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register "key.dev_name" = ""EJCT""
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register "key.linux_code" = "SW_PEN_INSERTED"
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register "key.linux_input_type" = "EV_SW"
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@ -71,7 +71,9 @@ chip soc/intel/cannonlake
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end
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chip drivers/generic/gpio_keys
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register "name" = ""PENH""
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register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_HIGH(GPP_A8)"
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register "gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A8)"
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register "key.wake" = "GPE0_DW0_08"
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register "key.wakeup_event_action" = "EV_ACT_ASSERTED"
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register "key.dev_name" = ""EJCT""
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register "key.linux_code" = "SW_PEN_INSERTED"
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register "key.linux_input_type" = "EV_SW"
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