mainboard/google/hatch: Enable PEN_EJECT_L as wake & notify source.

Updated GPP_A8 to be a GPI and SCI source, to support both wake and
notifications.

BUG=b:128941098
BRANCH=none
TEST=Compiles, simulated pen eject with PCH_INT_L signal.  Both evtest
and waking from s0ix confirm this works.  The output of /proc/interrupts
confirms the correct interrupt is triggered.

Change-Id: I080fb3cbfb3e2f55209ca31824b00ca820d70f78
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32487
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Tim Wawrzynczak 2019-04-26 15:26:15 -06:00 committed by Patrick Georgi
parent 939440c48b
commit 3fe7c44d50
3 changed files with 8 additions and 4 deletions

View File

@ -30,8 +30,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI_INT(GPP_A6, NONE, PLTRST, LEVEL), PAD_CFG_GPI_INT(GPP_A6, NONE, PLTRST, LEVEL),
/* A7 : PP3300_SOC_A */ /* A7 : PP3300_SOC_A */
PAD_NC(GPP_A7, NONE), PAD_NC(GPP_A7, NONE),
/* A8 : EMR_GARAGE_DET */ /* A8 : PEN_GARAGE_DET_L */
PAD_CFG_GPI_GPIO_DRIVER(GPP_A8, NONE, DEEP), PAD_CFG_GPI_GPIO_DRIVER_SCI(GPP_A8, NONE, DEEP, LEVEL, NONE),
/* A9 : ESPI_CLK */ /* A9 : ESPI_CLK */
/* A10 : FPMCU_PCH_BOOT1 */ /* A10 : FPMCU_PCH_BOOT1 */
PAD_CFG_GPO(GPP_A10, 0, DEEP), PAD_CFG_GPO(GPP_A10, 0, DEEP),

View File

@ -86,7 +86,9 @@ chip soc/intel/cannonlake
end end
chip drivers/generic/gpio_keys chip drivers/generic/gpio_keys
register "name" = ""PENH"" register "name" = ""PENH""
register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_HIGH(GPP_A8)" register "gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A8)"
register "key.wake" = "GPE0_DW0_08"
register "key.wakeup_event_action" = "EV_ACT_ASSERTED"
register "key.dev_name" = ""EJCT"" register "key.dev_name" = ""EJCT""
register "key.linux_code" = "SW_PEN_INSERTED" register "key.linux_code" = "SW_PEN_INSERTED"
register "key.linux_input_type" = "EV_SW" register "key.linux_input_type" = "EV_SW"

View File

@ -71,7 +71,9 @@ chip soc/intel/cannonlake
end end
chip drivers/generic/gpio_keys chip drivers/generic/gpio_keys
register "name" = ""PENH"" register "name" = ""PENH""
register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_HIGH(GPP_A8)" register "gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A8)"
register "key.wake" = "GPE0_DW0_08"
register "key.wakeup_event_action" = "EV_ACT_ASSERTED"
register "key.dev_name" = ""EJCT"" register "key.dev_name" = ""EJCT""
register "key.linux_code" = "SW_PEN_INSERTED" register "key.linux_code" = "SW_PEN_INSERTED"
register "key.linux_input_type" = "EV_SW" register "key.linux_input_type" = "EV_SW"