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mb/asus/f2a85-m_pro: Enable super-I/O LDNs 0x0f and 0x14 

The LDNs don't have a 0x30 register to enable them. However,
with the devices set to `off`, coreboot won't configure them.

Change-Id: Iaea37c88524904a1dae8a6d3b5f07c6ea25bc3b2
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46021
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Nico Huber 2020-10-04 16:34:10 +02:00
parent 394bd94e0c
commit 3ff948651a
1 changed files with 2 additions and 2 deletions
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4
src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb
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@ -97,10 +97,10 @@ chip northbridge/amd/agesa/family15tn/root_complex
end end
device pnp 2e.d off end # WDT1 device pnp 2e.d off end # WDT1
device pnp 2e.e off end # CIR WAKE-UP device pnp 2e.e off end # CIR WAKE-UP
device pnp 2e.f off # GPIO Push-pull/Open-drain selection device pnp 2e.f on # GPIO Push-pull/Open-drain selection
irq 0xe6 = 7f irq 0xe6 = 7f
end end
device pnp 2e.14 off # PORT80 UART device pnp 2e.14 on # PORT80 UART
irq 0xe0 = 0x00 irq 0xe0 = 0x00
end end
device pnp 2e.16 off end # Deep Sleep device pnp 2e.16 off end # Deep Sleep