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mb/google/poppy/variants/nami: Prevent leakage with touchscreen on Pantheon 

We found GPP_C3 keeps high when system in S0ix mode. It caused 1.8V
leakage. To fix this problem, add GPP_C3 into config for Pantheon
Synaptics touchscreen.

BUG=b:78436458
BRANCH=None
TEST=Let DUT in S0ix mode and check GPP_C3 is normal.

Change-Id: Idb2dab93178af1dae54265e49522b473b69a35af
Signed-off-by: Crystal Lin <crystal_lin@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/27177
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Crystal Lin 2018-06-21 16:29:33 +08:00 committed by Furquan Shaikh
parent 39ac797eda
commit 3ff98ca858
1 changed files with 17 additions and 5 deletions
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22
src/mainboard/google/poppy/variants/nami/gpio.c
View File

@ -118,8 +118,6 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
/* C2 : SMBALERT# ==> NC(TP917) */ /* C2 : SMBALERT# ==> NC(TP917) */
PAD_CFG_NC(GPP_C2), PAD_CFG_NC(GPP_C2),
/* C3 : SML0CLK ==> TOUCHSCREEN_DIS# */
PAD_CFG_GPO(GPP_C3, 0, DEEP),
/* C4 : SML0DATA ==> NC */ /* C4 : SML0DATA ==> NC */
PAD_CFG_NC(GPP_C4), PAD_CFG_NC(GPP_C4),
/* C5 : SML0ALERT# ==> SOC_SML0ALERT# (unstuffed) */ /* C5 : SML0ALERT# ==> SOC_SML0ALERT# (unstuffed) */
@ -389,11 +387,22 @@ const struct pad_config *variant_early_gpio_table(size_t *num)
static const struct pad_config nami_default_sku_gpio_table[] = { static const struct pad_config nami_default_sku_gpio_table[] = {
/* D17 : DMIC_CLK1 ==> SOC_DMIC_CLK1 */ /* D17 : DMIC_CLK1 ==> SOC_DMIC_CLK1 */
PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1), PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
/* C3 : SML0CLK ==> TOUCHSCREEN_DIS# */
PAD_CFG_GPO(GPP_C3, 0, DEEP),
}; };
static const struct pad_config no_dmic1_sku_gpio_table[] = { static const struct pad_config no_dmic1_sku_gpio_table[] = {
/* D17 : DMIC_CLK1 ==> NC */ /* D17 : DMIC_CLK1 ==> NC */
PAD_CFG_NC(GPP_D17), PAD_CFG_NC(GPP_D17),
/* C3 : SML0CLK ==> TOUCHSCREEN_DIS# */
PAD_CFG_GPO(GPP_C3, 0, DEEP),
};
static const struct pad_config pantheon_gpio_table[] = {
/* D17 : DMIC_CLK1 ==> NC */
PAD_CFG_NC(GPP_D17),
/* C3 : SML0CLK ==> NC */
PAD_CFG_NC(GPP_C3),
}; };
const struct pad_config *variant_sku_gpio_table(size_t *num) const struct pad_config *variant_sku_gpio_table(size_t *num)
@ -404,14 +413,17 @@ const struct pad_config *variant_sku_gpio_table(size_t *num)
case SKU_0_VAYNE: case SKU_0_VAYNE:
case SKU_1_VAYNE: case SKU_1_VAYNE:
case SKU_2_VAYNE: case SKU_2_VAYNE:
case SKU_0_PANTHEON:
case SKU_1_PANTHEON:
case SKU_2_PANTHEON:
case SKU_0_SONA: case SKU_0_SONA:
case SKU_1_SONA: case SKU_1_SONA:
*num = ARRAY_SIZE(no_dmic1_sku_gpio_table); *num = ARRAY_SIZE(no_dmic1_sku_gpio_table);
board_gpio_tables = no_dmic1_sku_gpio_table; board_gpio_tables = no_dmic1_sku_gpio_table;
break; break;
case SKU_0_PANTHEON:
case SKU_1_PANTHEON:
case SKU_2_PANTHEON:
*num = ARRAY_SIZE(pantheon_gpio_table);
board_gpio_tables = pantheon_gpio_table;
break;
default: default:
*num = ARRAY_SIZE(nami_default_sku_gpio_table); *num = ARRAY_SIZE(nami_default_sku_gpio_table);
board_gpio_tables = nami_default_sku_gpio_table; board_gpio_tables = nami_default_sku_gpio_table;