cpu/intel: Remove unused CPU code
Change-Id: I44574e64e621ea60d559d593694af36c648fb7d7 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/23302 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Arthur Heymans
Stefan Reinauer
parent
fda071ca7a
commit
3fff81710c
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@ -1,8 +0,0 @@
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config CPU_INTEL_MODEL_F0X
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bool
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select ARCH_BOOTBLOCK_X86_32
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select ARCH_VERSTAGE_X86_32
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select ARCH_ROMSTAGE_X86_32
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select ARCH_RAMSTAGE_X86_32
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select SMP
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select SUPPORT_CPU_UCODE_IN_CBFS
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@ -1,3 +0,0 @@
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ramstage-y += model_f0x_init.c
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cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_f0x/microcode.bin
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@ -1,51 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <console/console.h>
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#include <device/device.h>
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#include <string.h>
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#include <cpu/cpu.h>
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#include <cpu/x86/mtrr.h>
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#include <cpu/x86/msr.h>
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#include <cpu/x86/lapic.h>
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#include <cpu/intel/microcode.h>
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#include <cpu/x86/cache.h>
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static void model_f0x_init(struct device *dev)
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{
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/* Turn on caching if we haven't already */
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x86_enable_cache();
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x86_setup_mtrrs();
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x86_mtrr_check();
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/* Update the microcode */
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intel_update_microcode_from_cbfs();
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/* Enable the local CPU APICs */
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setup_lapic();
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};
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static struct device_operations cpu_dev_ops = {
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.init = model_f0x_init,
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};
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static const struct cpu_device_id cpu_table[] = {
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{ X86_VENDOR_INTEL, 0x0f07 },
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{ X86_VENDOR_INTEL, 0x0f0A },
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{ 0, 0 },
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};
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static const struct cpu_driver driver __cpu_driver = {
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.ops = &cpu_dev_ops,
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.id_table = cpu_table,
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};
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@ -1,8 +0,0 @@
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config CPU_INTEL_MODEL_F1X
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bool
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select ARCH_BOOTBLOCK_X86_32
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select ARCH_VERSTAGE_X86_32
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select ARCH_ROMSTAGE_X86_32
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select ARCH_RAMSTAGE_X86_32
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select SMP
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select SUPPORT_CPU_UCODE_IN_CBFS
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@ -1,3 +0,0 @@
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ramstage-y += model_f1x_init.c
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cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_f1x/microcode.bin
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@ -1,51 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <console/console.h>
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#include <device/device.h>
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#include <string.h>
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#include <cpu/cpu.h>
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#include <cpu/x86/mtrr.h>
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#include <cpu/x86/msr.h>
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#include <cpu/x86/lapic.h>
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#include <cpu/intel/microcode.h>
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#include <cpu/x86/cache.h>
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static void model_f1x_init(struct device *dev)
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{
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/* Turn on caching if we haven't already */
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x86_enable_cache();
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x86_setup_mtrrs();
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x86_mtrr_check();
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/* Update the microcode */
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intel_update_microcode_from_cbfs();
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/* Enable the local CPU APICs */
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setup_lapic();
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};
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static struct device_operations cpu_dev_ops = {
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.init = model_f1x_init,
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};
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static const struct cpu_device_id cpu_table[] = {
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{ X86_VENDOR_INTEL, 0x0f12 },
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{ X86_VENDOR_INTEL, 0x0f13 },
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{ 0, 0 },
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};
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static const struct cpu_driver driver __cpu_driver = {
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.ops = &cpu_dev_ops,
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.id_table = cpu_table,
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};
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@ -1,5 +0,0 @@
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config CPU_INTEL_SOCKET_MPGA603
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bool
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select CPU_INTEL_MODEL_F0X
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select CPU_INTEL_MODEL_F1X
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select CPU_INTEL_MODEL_F2X
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@ -1,10 +0,0 @@
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subdirs-y += ../model_f0x
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subdirs-y += ../model_f1x
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subdirs-y += ../model_f2x
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subdirs-y += ../../x86/tsc
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subdirs-y += ../../x86/mtrr
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subdirs-y += ../../x86/lapic
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subdirs-y += ../../x86/cache
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subdirs-y += ../../x86/smm
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subdirs-y += ../microcode
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subdirs-y += ../hyperthreading
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