diff --git a/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb b/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb
index 0db35ce8ee..dd442b2e3b 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb
+++ b/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb
@@ -68,6 +68,7 @@ chip northbridge/amd/agesa/family14/root_complex
 								register "hwm_fan1_seg2_speed_count" = "0x0e"
 								register "hwm_fan1_seg3_speed_count" = "0x07"
 								register "hwm_fan1_temp_map_sel" = "0x8c"
+								register "hwm_temp_sensor_type" = "0x0E"	# default value
 #
 # XXX: 4e is the default index port and .xy is the
 # LDN indexing the pnp_info array found in the superio.c