Get rid of some unneeded function prototypes in romstage.c files.

Abuild-tested.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6147 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/mainboard/a-trend/atc-6220/romstage.c

@@ -36,9 +36,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
 	return smbus_read_byte(device, address);

src/mainboard/a-trend/atc-6240/romstage.c

@@ -36,9 +36,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x3f0, W83627HF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
 	return smbus_read_byte(device, address);

src/mainboard/abit/be6-ii_v2_0/romstage.c

@@ -38,9 +38,6 @@
 /* FIXME: It's a Winbond W83977EF, actually. */
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
 	return smbus_read_byte(device, address);

src/mainboard/amd/mahogany_fam10/romstage.c

@@ -42,7 +42,6 @@
 #include "northbridge/amd/amdfam10/reset_test.c"
 #include <console/loglevel.h>
 #include "cpu/x86/bist.h"
-static int smbus_read_byte(u32 device, u32 address);
 #include "superio/ite/it8718f/it8718f_early_serial.c"
 #include <usbdebug.h>
 #include "cpu/x86/mtrr/earlymtrr.c"

src/mainboard/amd/tilapia_fam10/romstage.c

@@ -42,7 +42,6 @@
 #include "northbridge/amd/amdfam10/reset_test.c"
 #include <console/loglevel.h>
 #include "cpu/x86/bist.h"
-static int smbus_read_byte(u32 device, u32 address);
 #include "superio/ite/it8718f/it8718f_early_serial.c"
 #include <usbdebug.h>
 #include "cpu/x86/mtrr/earlymtrr.c"

src/mainboard/asus/m4a78-em/romstage.c

@@ -42,7 +42,6 @@
 #include "northbridge/amd/amdfam10/reset_test.c"
 #include <console/loglevel.h>
 #include "cpu/x86/bist.h"
-static int smbus_read_byte(u32 device, u32 address);
 #include "superio/ite/it8712f/it8712f_early_serial.c"
 #include <usbdebug.h>
 #include "cpu/x86/mtrr/earlymtrr.c"

src/mainboard/asus/m4a785-m/romstage.c

@@ -42,7 +42,6 @@
 #include "northbridge/amd/amdfam10/reset_test.c"
 #include <console/loglevel.h>
 #include "cpu/x86/bist.h"
-static int smbus_read_byte(u32 device, u32 address);
 #include "superio/ite/it8712f/it8712f_early_serial.c"
 #include <usbdebug.h>
 #include "cpu/x86/mtrr/earlymtrr.c"

src/mainboard/asus/mew-am/romstage.c

@@ -34,9 +34,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 void main(unsigned long bist)
 {
 	smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

src/mainboard/asus/mew-vm/romstage.c

@@ -34,9 +34,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x2e, LPC47B272_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 void main(unsigned long bist)
 {
 	lpc47b272_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

src/mainboard/asus/p2b-d/romstage.c

@@ -37,9 +37,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
 	return smbus_read_byte(device, address);

src/mainboard/asus/p2b-ds/romstage.c

@@ -36,9 +36,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
 	return smbus_read_byte(device, address);

src/mainboard/asus/p2b-f/romstage.c

@@ -38,9 +38,6 @@
 /* FIXME: The ASUS P2B-F has a Winbond W83977EF, actually. */
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
 	return smbus_read_byte(device, address);

src/mainboard/asus/p2b-ls/romstage.c

@@ -38,9 +38,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
 	return smbus_read_byte(device, address);

src/mainboard/asus/p2b/romstage.c

@@ -36,9 +36,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
 	return smbus_read_byte(device, address);

src/mainboard/asus/p3b-f/romstage.c

@@ -35,10 +35,6 @@
 #include "superio/winbond/w83977tf/w83977tf_early_serial.c"
 #include <lib.h>
 
-void enable_pm(void);
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 /* FIXME: The ASUS P3B-F has a Winbond W83977EF, actually. */
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 

src/mainboard/azza/pt-6ibd/romstage.c

@@ -38,9 +38,6 @@
 /* FIXME: It's a Winbond W83977EF, actually. */
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
 	return smbus_read_byte(device, address);

src/mainboard/biostar/m6tba/romstage.c

@@ -36,9 +36,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x3f0, SMSCSUPERIO_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
 	return smbus_read_byte(device, address);

src/mainboard/compaq/deskpro_en_sff_p600/romstage.c

@@ -38,9 +38,6 @@
 /* FIXME: This should be PC97307 (but it's buggy at the moment)! */
 #define SERIAL_DEV PNP_DEV(0x15c, PC97317_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
 	return smbus_read_byte(device, address);

src/mainboard/ecs/p6iwp-fe/romstage.c

@@ -33,9 +33,6 @@
 #include "superio/ite/it8712f/it8712f_early_serial.c"
 #include <lib.h>
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 void main(unsigned long bist)
 {
 	it8712f_24mhz_clkin();

src/mainboard/getac/p470/romstage.c

@@ -35,8 +35,6 @@
 #include "northbridge/intel/i945/raminit.h"
 #include "southbridge/intel/i82801gx/i82801gx.h"
 
-void enable_smbus(void);
-
 void setup_ich7_gpios(void)
 {
 	u32 gpios;

src/mainboard/gigabyte/ga-6bxc/romstage.c

@@ -37,9 +37,6 @@ void it8671f_48mhz_clkin(void);
 
 #define SERIAL_DEV PNP_DEV(0x3f0, IT8671F_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
 	return smbus_read_byte(device, address);

src/mainboard/gigabyte/ga-6bxe/romstage.c

@@ -38,9 +38,6 @@ static void it8671f_48mhz_clkin(void);
 
 #define SERIAL_DEV PNP_DEV(0x3f0, IT8671F_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
 	return smbus_read_byte(device, address);

src/mainboard/gigabyte/ma785gmt/romstage.c

@@ -38,7 +38,6 @@
 #include "northbridge/amd/amdfam10/reset_test.c"
 #include <console/loglevel.h>
 #include "cpu/x86/bist.h"
-static int smbus_read_byte(u32 device, u32 address);
 #include "superio/ite/it8718f/it8718f_early_serial.c"
 #include <usbdebug.h>
 #include "cpu/x86/mtrr/earlymtrr.c"

src/mainboard/gigabyte/ma78gm/romstage.c

@@ -42,7 +42,6 @@
 #include "northbridge/amd/amdfam10/reset_test.c"
 #include <console/loglevel.h>
 #include "cpu/x86/bist.h"
-static int smbus_read_byte(u32 device, u32 address);
 #include "superio/ite/it8718f/it8718f_early_serial.c"
 #include <usbdebug.h>
 #include "cpu/x86/mtrr/earlymtrr.c"

src/mainboard/hp/e_vectra_p2706t/romstage.c

@@ -38,9 +38,6 @@
 /* TODO: It's a PC87364 actually! */
 #define SERIAL_DEV PNP_DEV(0x2e, PC87360_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 void main(unsigned long bist)
 {
 	/* TODO: It's a PC87364 actually! */

src/mainboard/ibase/mb899/romstage.c

@@ -40,8 +40,6 @@
 #define SERIAL_DEV PNP_DEV(0x4e, W83627EHG_SP1)
 #define DUMMY_DEV PNP_DEV(0x4e, 0)
 
-void enable_smbus(void);
-
 void setup_ich7_gpios(void)
 {
 	printk(BIOS_DEBUG, " GPIOS...");

src/mainboard/iei/kino-780am2-fam10/romstage.c

@@ -42,7 +42,6 @@
 #include "northbridge/amd/amdfam10/reset_test.c"
 #include <console/loglevel.h>
 #include "cpu/x86/bist.h"
-static int smbus_read_byte(u32 device, u32 address);
 #include "superio/fintek/f71859/f71859_early_serial.c"
 #include <usbdebug.h>
 #include "cpu/x86/mtrr/earlymtrr.c"

src/mainboard/intel/d810e2cb/romstage.c

@@ -35,9 +35,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 void main(unsigned long bist)
 {
 	/* Set southbridge and Super I/O GPIOs. */

src/mainboard/intel/d945gclf/romstage.c

@@ -39,8 +39,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1)
 
-void enable_smbus(void);
-
 void setup_ich7_gpios(void)
 {
 	/* TODO: This is highly board specific and should be moved */

src/mainboard/jetway/pa78vm5/romstage.c

@@ -43,7 +43,6 @@
 #include "northbridge/amd/amdfam10/reset_test.c"
 #include <console/loglevel.h>
 #include "cpu/x86/bist.h"
-static int smbus_read_byte(u32 device, u32 address);
 #include "superio/fintek/f71863fg/f71863fg_early_serial.c"
 #include <usbdebug.h>
 #include "cpu/x86/mtrr/earlymtrr.c"

src/mainboard/kontron/986lcd-m/romstage.c

@@ -34,7 +34,6 @@
 #include <console/console.h>
 #include <cpu/x86/bist.h>
 #include "superio/winbond/w83627thg/w83627thg_early_serial.c"
-void enable_smbus(void);
 #include "northbridge/intel/i945/i945.h"
 #include "northbridge/intel/i945/raminit.h"
 #include "southbridge/intel/i82801gx/i82801gx.h"

src/mainboard/mitac/6513wu/romstage.c

@@ -35,9 +35,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 void main(unsigned long bist)
 {
 	smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

src/mainboard/msi/ms6119/romstage.c

@@ -36,9 +36,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
 	return smbus_read_byte(device, address);

src/mainboard/msi/ms6147/romstage.c

@@ -36,9 +36,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
 	return smbus_read_byte(device, address);

src/mainboard/msi/ms6156/romstage.c

@@ -36,9 +36,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
 	return smbus_read_byte(device, address);

src/mainboard/msi/ms6178/romstage.c

@@ -35,9 +35,6 @@
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 #define DUMMY_DEV PNP_DEV(0x2e, 0)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 void main(unsigned long bist)
 {
 	w83627hf_set_clksel_48(DUMMY_DEV);

src/mainboard/nec/powermate2000/romstage.c

@@ -34,9 +34,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 void main(unsigned long bist)
 {
 	smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

src/mainboard/nokia/ip530/romstage.c

@@ -36,9 +36,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x3f0, SMSCSUPERIO_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
 	return smbus_read_byte(device, address);

src/mainboard/roda/rk886ex/romstage.c

@@ -37,8 +37,6 @@
 #include "northbridge/intel/i945/raminit.h"
 #include "southbridge/intel/i82801gx/i82801gx.h"
 
-void enable_smbus(void);
-
 void setup_ich7_gpios(void)
 {
 	printk(BIOS_DEBUG, " GPIOS...");

src/mainboard/soyo/sy-6ba-plus-iii/romstage.c

@@ -37,9 +37,6 @@ void it8671f_48mhz_clkin(void);
 
 #define SERIAL_DEV PNP_DEV(0x370, IT8671F_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
 	return smbus_read_byte(device, address);

src/mainboard/tyan/s1846/romstage.c

@@ -36,9 +36,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x2e, PC87309_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
 	return smbus_read_byte(device, address);

src/northbridge/intel/i945/i945.h

@@ -337,9 +337,6 @@ int i945_silicon_revision(void);
 void i945_early_initialization(void);
 void i945_late_initialization(void);
 
-/* provided by southbridge code */
-int smbus_read_byte(unsigned device, unsigned address);
-
 /* provided by mainboard code */
 void setup_ich7_gpios(void);
 

src/southbridge/intel/i82371eb/i82371eb.h

@@ -36,6 +36,12 @@ void i82371eb_hard_reset(void);
 #endif
 #endif
 
+#if defined(__PRE_RAM__) && !defined(__ROMCC__)
+void enable_smbus(void);
+int smbus_read_byte(u8 device, u8 address);
+void enable_pm(void);
+#endif
+
 /* If 'cond' is true this macro sets the bit(s) specified by 'bits' in the
  * 'reg' variable, otherwise it clears those bits.
  *

src/southbridge/intel/i82371eb/i82371eb_early_pm.c

@@ -26,8 +26,6 @@
 #include <console/console.h>
 #include "i82371eb.h"
 
-void enable_pm(void);
-
 void enable_pm(void)
 {
 	device_t dev;

src/southbridge/intel/i82371eb/i82371eb_early_smbus.c

@@ -27,8 +27,6 @@
 #include "i82371eb.h"
 #include "i82371eb_smbus.h"
 
-int smbus_read_byte(u8 device, u8 address);
-
 void enable_smbus(void)
 {
 	device_t dev;

src/southbridge/intel/i82371eb/i82371eb_smbus.h

@@ -1,4 +1,5 @@
 #include <device/smbus_def.h>
+#include "i82371eb.h"
 
 #define SMBHST_STATUS 	0x0
 #define SMBHST_CTL    	0x2
@@ -10,7 +11,6 @@
 #define SMBUS_STATUS_MASK 0x1e
 #define SMBUS_ERROR_FLAG (1<<2)
 
-void enable_smbus(void);
 int do_smbus_read_byte(unsigned smbus_io_base, unsigned device, unsigned address);
 
 static inline void smbus_delay(void)

src/southbridge/intel/i82801ax/i82801ax.h

@@ -23,7 +23,12 @@
 
 #if !defined(__PRE_RAM__)
 #include "chip.h"
-extern void i82801ax_enable(device_t dev);
+void i82801ax_enable(device_t dev);
+#endif
+
+#if defined(__PRE_RAM__) && !defined(__ROMCC__)
+void enable_smbus(void);
+int smbus_read_byte(u8 device, u8 address);
 #endif
 
 #define SMBUS_IO_BASE		0x0f00

src/southbridge/intel/i82801ax/i82801ax_early_smbus.c

@@ -28,8 +28,6 @@
 #include "i82801ax.h"
 #include "i82801ax_smbus.h"
 
-int smbus_read_byte(u8 device, u8 address);
-
 void enable_smbus(void)
 {
 	device_t dev;

src/southbridge/intel/i82801ax/i82801ax_smbus.h

@@ -19,8 +19,8 @@
  */
 
 #include <device/smbus_def.h>
+#include "i82801ax.h"
 
-void enable_smbus(void);
 int do_smbus_read_byte(u16 smbus_io_base, u8 device, u8 address);
 
 static void smbus_delay(void)

src/southbridge/intel/i82801bx/i82801bx.h

@@ -26,6 +26,11 @@
 extern void i82801bx_enable(device_t dev);
 #endif
 
+#if defined(__PRE_RAM__) && !defined(__ROMCC__)
+void enable_smbus(void);
+int smbus_read_byte(u8 device, u8 address);
+#endif
+
 #define SMBUS_IO_BASE		0x0f00
 #define PMBASE_ADDR		0x0400
 #define GPIO_BASE_ADDR		0x0500

src/southbridge/intel/i82801bx/i82801bx_early_smbus.c

@@ -28,8 +28,6 @@
 #include "i82801bx.h"
 #include "i82801bx_smbus.h"
 
-int smbus_read_byte(u8 device, u8 address);
-
 void enable_smbus(void)
 {
 	device_t dev;

src/southbridge/intel/i82801bx/i82801bx_smbus.h

@@ -20,8 +20,6 @@
 
 #include <device/smbus_def.h>
 
-void enable_smbus(void);
-
 static void smbus_delay(void)
 {
 	inb(0x80);

src/southbridge/intel/i82801gx/i82801gx.h

@@ -46,6 +46,11 @@ extern void i82801gx_enable(device_t dev);
 void i82801gx_enable_usbdebug(unsigned int port);
 #endif
 
+#if defined(__PRE_RAM__) && !defined(__ROMCC__) && !defined(ASSEMBLY)
+void enable_smbus(void);
+int smbus_read_byte(unsigned device, unsigned address);
+#endif
+
 #define MAINBOARD_POWER_OFF	0
 #define MAINBOARD_POWER_ON	1
 #define MAINBOARD_POWER_KEEP	2

src/southbridge/intel/i82801gx/i82801gx_early_smbus.c

@@ -26,8 +26,6 @@
 #include "i82801gx.h"
 #include "i82801gx_smbus.h"
 
-int smbus_read_byte(unsigned device, unsigned address);
-
 void enable_smbus(void)
 {
 	device_t dev;

src/southbridge/intel/i82801gx/i82801gx_smbus.h

@@ -19,8 +19,7 @@
  */
 
 #include <device/smbus_def.h>
-
-void enable_smbus(void);
+#include "i82801gx.h"
 
 static void smbus_delay(void)
 {