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bd82x6x: Fix compiling with USB debug port support 

At some point, compiles with USB Debug port stopped working. This change makes
a trivial reordering in the code and adds two makefile entries to make it build
without errors. It also works on stout.

Build and boot as normal. Works. Enable CONFIG_USB, connect USB debug hardware
to the correct port (on stout, that's the one on the left nearest the back) and
watch for output.

Change-Id: I7fbb7983a19b0872e2d9e4248db8949e72beaaa0
Signed-off-by: Ronald G. Minnich <rminnich@google.com>
Reviewed-on: http://review.coreboot.org/2784
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
This commit is contained in:
Ronald G. Minnich 2013-02-04 20:31:51 -08:00 committed by Ronald G. Minnich
parent fa91819e89
commit 4063ede3fb
2 changed files with 11 additions and 7 deletions
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2
src/southbridge/intel/bd82x6x/Makefile.inc
View File

@ -40,7 +40,9 @@ ramstage-y += watchdog.c
ramstage-$(CONFIG_ELOG) += elog.c ramstage-$(CONFIG_ELOG) += elog.c
ramstage-y += spi.c ramstage-y += spi.c
ramstage-$(CONFIG_USBDEBUG) += usb_debug.c
smm-$(CONFIG_SPI_FLASH_SMM) += spi.c smm-$(CONFIG_SPI_FLASH_SMM) += spi.c
smm-$(CONFIG_USBDEBUG) += usb_debug.c
ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me.c me_8.x.c finalize.c pch.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me.c me_8.x.c finalize.c pch.c

16
src/southbridge/intel/bd82x6x/usb_debug.c
View File

@ -19,18 +19,13 @@
#include <stdint.h> #include <stdint.h>
#include <arch/io.h> #include <arch/io.h>
#include <arch/romcc_io.h>
#include <console/console.h> #include <console/console.h>
#include <usbdebug.h> #include <usbdebug.h>
#include <device/pci_def.h> #include <device/pci_def.h>
#include "pch.h" #include "pch.h"
/* Required for successful build, but currently empty. */ #ifdef __PRE_RAM__
void set_debug_port(unsigned int port) #include <arch/romcc_io.h>
{
/* Not needed, the ICH* southbridges hardcode physical USB port 1. */
}
void enable_usbdebug(unsigned int port) void enable_usbdebug(unsigned int port)
{ {
u32 dbgctl; u32 dbgctl;
@ -48,4 +43,11 @@ void enable_usbdebug(unsigned int port)
dbgctl |= (1 << 30); dbgctl |= (1 << 30);
write32(CONFIG_EHCI_BAR + CONFIG_EHCI_DEBUG_OFFSET, dbgctl); write32(CONFIG_EHCI_BAR + CONFIG_EHCI_DEBUG_OFFSET, dbgctl);
} }
#endif /* __PRE_RAM__ */
/* Required for successful build, but currently empty. */
void set_debug_port(unsigned int port)
{
/* Not needed, the ICH* southbridges hardcode physical USB port 1. */
}