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mb/google/poppy/variant/atlas: config GPP_F10 to use PLTRST 

GPIO's that use GPI_APIC setting with DEEP causes an IRQ storm after
S3 resume. GPIOs that fire IRQs via IOAPIC need to get their logic
reset over PLTRST to prevent IRQ storm after S3 resume and hence
configuring GPP_F10 (HP_IRQ_GPIO) to use PLTRST.

BUG=none
TEST=none

Change-Id: Idc6c42cb4dc6e8eb368d605c83f584f4c69077dc
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/29540
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Nick Vaccaro 2018-11-07 13:19:36 -08:00 committed by Patrick Georgi
parent a5f5790c93
commit 40b41826e1
1 changed files with 1 additions and 1 deletions
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2
src/mainboard/google/poppy/variants/atlas/gpio.c
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@ -273,7 +273,7 @@ static const struct pad_config gpio_table[] = {
/* F9 : I2C4_SCL ==> PCH_I2C4_AUDIO_1V8_SCL */
PAD_CFG_NF_1V8(GPP_F9, NONE, DEEP, NF1),
/* F10 : I2C5_SDA ==> HP_IRQ_GPIO */
PAD_CFG_GPI_APIC(GPP_F10, 20K_PU, DEEP),
PAD_CFG_GPI_APIC(GPP_F10, 20K_PU, PLTRST),
/* F11 : I2C5_SCL ==> SPKR_RST_L */
PAD_CFG_GPO(GPP_F11, 1, RSMRST),
/* F12 : EMMC_CMD */